參數(shù)資料
型號： M37920S4CGP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, 20 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù)： 21/40頁
文件大?。?/td> 675K
代理商： M37920S4CGP
27
M37920S4CGP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Switching characteristics (VCC = 5 V ± 10 %, VSS = 0 V, Ta = –20 to 85 °C, f(XIN) = 20 MHz, unless otherwise noted)
15
10
15
10
0.5tc + 10
Read low-level output delay time
Read high-level output delay time
Write low-level output delay time
Write high-level output delay time
ALE pulse width
ALE completion delay time after address stabilization
Read output pulse width
Read output high-level width (Note 1)
Write disable valid time after read (Note 2)
Address valid time before read
Address hold time after read (Note 3)
ALE completion delay time after read start
Read disable valid time after ALE completion
Chip select valid time before read
Chip select output valid time before read completion
Chip select hold time after read
Next write cycle data output delay time after read
(Note 2)
Write output pulse width
Write output high-level width (Note 1)
Read disable valid time after write (Note 2)
Address valid time before write
Address hold time after write (Note 3)
ALE completion delay time after write start
Write disable valid time after ALE completion
Chip select valid time before write
Chip select output valid time before write completion
Chip select hold time after write
Data output valid time before write completion
Data hold time after write
Floating start delay time after write
–10
tc – 20
1.5tc – 30
2tc – 15
tc – 15
2tc – 30
8
0.5tc – 20
1.5tc – 20
3.5tc – 20
0.5tc – 20
tc – 15
2tc – 15
tc – 15
2tc-30
8
0.5tc – 20
1.5tc – 20
3.5tc – 20
0.5tc – 20
2tc – 20
0.5tc – 10
15
10
15
10
20
0.5tc + 10
–10
0.5tc – 20
tc – 30
(1 + W)tc – 15
tc – 15
tc – 30
8
0.5tc – 20
(1.5 + W)tc – 20
0.5tc – 20
tc – 15
(1 + W)tc – 15
tc – 15
tc – 30
8
0.5tc – 20
(1.5 + W)tc – 20
0.5tc – 20
(1 + W)tc – 20
0.5tc – 10
td(
φ1-RDL)
td(
φ1-RDH)
td(
φ1-BXWL)
td(
φ1-BXWH)
tw(ALEH)
td(A-ALEL)
tw(RDL)
tw(RDH)
td(RDH-BXWH)
td(A-RDH)
th(RDH-A)
td(RDH-ALEL)
td(ALEL-RDH)
td(CSiL-RDH)
td(CSiL-RDL)
th(RDH-CSiL)
td(RDH-D)
tw(BXWL)
tw(BXWH)
td(BXWH-RDH)
td(A-BXWH)
th(BXWH-A)
td(BXWH-ALEL)
td(ALEL-BXWH)
td(CSiL-BXWH)
td(CSiL-BXWL)
th(BXWH-CSiL)
td(D-BXWL)
th(BXWH-D)
tpxz(BXWH-DZ)
ns
Parameter
Max.
Min.
Unit
Symbol
Limits
Max.
Min.
When 0/1/2 wait is selected When ALE expansion wait is selected
Notes 1: When the bus cycle just before this parameter is for the area where the recovery cycle insertion is selected, this parameter is extended by tc (ns).
2: When accessing the area where the recovery cycle insertion is selected, this parameter is extended by tc (ns).
3: When accessing the area where the recovery cycle insertion is selected, this parameter is extended by tc (ns). However, except for the case at
instruction prefetch.
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