參數(shù)資料
型號(hào)： M37905M8C-XXXFP
廠商： Mitsubishi Electric Corporation
英文描述： 16 BIT CMOS MICROCOMPUTER
中文描述： 16位CMOS微機(jī)
文件頁(yè)數(shù)： 54/102頁(yè)
文件大小： 881K
代理商： M37905M8C-XXXFP
54
M37905M4C-XXXFP, M37905M4C-XXXSP
M37905M6C-XXXFP, M37905M6C-XXXSP
M37905M8C-XXXFP, M37905M8C-XXXSP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
SERIAL I/O PORTS
Two independent serial I/O ports are provided. Figure 60 shows a
block diagram of the serial I/O ports.
Bits 0 through 2 of the UARTi(i = 0, 1, 2) transmit/receive mode reg-
ister shown in Figure 61 are used to determine whether to use ports
P1 and P8 as programmable I/O ports, clock synchronous serial I/O
ports, or asynchronous (UART) serial I/O ports which use start and
stop bits.
Figures 62 and 63 show the block diagrams of the receiver/transmit-
ter.
Figure 64 shows the bit configuration of the UARTi transmit/receive
control register.
Each communication method is described below.
Fig. 61 Bit configuration of UARTi transmit/receive mode register
Fig. 60 Block diagram of serial I/O port
UARTi receive register
T
X
D
i
R
X
D
i
Receive
control
circuit
Transmit
control
circuit
UARTi transmit register
1/16 divider
Clock synchronous
1/2 divider
1/(n + 1) divider
1/16 divider
Clock synchronous
Clock synchronous
Transfer clock
Transfer clock
UARTi
transmit buffer register
UART0 (Addresses 33
16
, 32
16
)
UART1 (Addresses 3B
16
, 3A
16
)
UART2 (Addresses B3
16
, B2
16
)
Bit converter
UART
Clock synchronous (when internal clock selected)
BRG count source select bits
f
2
f
16
f
64
f
512
(Internal clock)
UART
D
7
D
6
D
5
D
4
D
3
D
2
D
1
UARTi
receive buffer register
D
0
D
7
D
8
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0 D
8
0
0
0
0
0
0
BRGi
UART0 (Addresses 37
16,
36
16
)
UART1 (Addresses 3F
16
, 3E
16
)
UART2 (Addresses B7
16
, B6
16
)
CTS
i
/RTS
i
Clock synchronous
(External clock)
n = a value set into the UARTi baud rate register (BRGi)
CLK
i
CTS
i
CTS
i
/CLK
i
Data bus (even)
Data bus (odd)
Bit converter
Data bus (odd)
Data bus (even)
Serial I/O mode select bits
0 0 0 : Serial I/O is invalid. (Ports P1 and P8 function as programmable I/O ports.)
0 0 1 : Clock synchronous
1 0 0 : 7-bit UART
1 0 1 : 8-bit UART
1 1 0 : 9-bit UART
Internal/External clock select bit
0 : Internal clock
1 : External clock
Stop bit length select bit (Valid in UART mode.)
0 : 1 stop bit
1 : 2 stop bits
Odd/Even parity select bit (Valid in UART mode with the parity enable bit = “1”.)
(Note)
0 : Odd parity
1 : Even parity
Parity enable bit (Valid in UART mode)
(Note)
0 :
No parity
1 : With parity
Sleep select bit (Valid in UART mode)
(Note)
0 : No sleep
1 : Sleep
Note:
In the clock synchronous serial I/O mode, bits 4 to 6 are invalid. (Each of them may be
“
0
”
or
“
1
”
.) Furthermore, fix bit 7 to
“
0
”
.
7 6 5 4 3 2 1 0
UART 0 Transmit/Receive mode register
UART 1 Transmit/Receive mode register
UART 2 Transmit/Receive mode register
Addresses
30
16
38
16
B0
16
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