參數(shù)資料
型號(hào)： M37736MHB
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述： 單片16位CMOS微機(jī)
文件頁(yè)數(shù)： 66/96頁(yè)
文件大?。?/td> 1328K
代理商： M37736MHB
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37736MHBXXXGP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
66
ROM AREA MODIFICATION FUNCTION
The internal ROM size and RAM size of the M37736MHBXXXGP can
be modified by the memory allocation control register’s bits 0,1 and 2
shown in Figure 71.
Figure 73 shows the memory allocation in which the internal ROM
size and RAM size are modified.
Make sure to write data in the memory allocation control register as
the flow shown in Figure 72.
This ROM area modification function is valid in memory expansion
mode and single-chip mode.
Table 12 shows the relationship between the memory allocation
selection bits and addresses corresponding to chip-select signals
CS
0
and
CS
1
in the memory expansion mode with the external bus
mode B.
When ordering a mask ROM, Mitsubishi Electric corp. produces the
mask ROM using the data within 128 Kbytes (addresses 000000
16
–
01FFFF
16
). It is regardless of the selected ROM size (refer to MASK
ROM ORDER CONFIRMATION FORM.) Therefore, program “FF
16
”
to the addresses out of the selected ROM area in the EPROM which
you tender when ordering a mask ROM.
Address 01FFFF
16
of this microcomputer corresponds to the lowest
address of the EPROM which you tender.
7
6
5
4
3
2
1
0
0
0
ML
2
ML
1
ML
0
Memory allocation control register
Memory allocation selection bits
ROM size RAM size
0 0 0 : 124 Kbytes 3968 bytes
0 0 1 : 120 Kbytes 3968 bytes
0 1 0 : 60 Kbytes 2048 bytes
1 0 0 : 32 Kbytes 2048 bytes
1 0 1 : 16 Kbytes 2048 bytes
1 1 0 : 96 Kbytes 3968 bytes
0 0 : Always “00” (However, writing data “55
16
”
shown
in Figure 72 is possible.)
Address
63
16
Note.
Write to the memory allocation control register as the flow shown in Figure 72.
Writing data “55
16
” (LDM instruction)
Writing data “0Y
16
” (LDM instruction)
ML
2
, ML
1
, ML
0
selection bits
Next instruction
How to write in memory allocation control register
Note.
“Y” is the sum of bits to be set. For example, when setting bit 1 to “1”, “Y” becomes “2”.
Fig. 71 Bit configuration of memory allocation control register
Memory allocation selection bits
ML
2
ML
1
0
0
0
1
0
Internal ROM area
Access addresses
CS
0
CS
1
ML
0
0
1
0
0
1
1
0
0
1
0
1
1
0
001000
16
– 01FFFF
16
002000
16
– 01FFFF
16
001000
16
– 00FFFF
16
008000
16
– 00FFFF
16
00C000
16
– 00FFFF
16
008000
16
– 01FFFF
16
——————
001000
16
– 001FFF
16
000880
16
– 000FFF
16
000880
16
– 007FFF
16
000880
16
– 007FFF
16
001000
16
– 007FFF
16
020000
16
– 03FFFF
16
020000
16
– 03FFFF
16
010000
16
– 03FFFF
16
010000
16
– 03FFFF
16
008000
16
– 00BFFF
16
010000
16
– 03FFFF
16
020000
16
– 03FFFF
16
Table 12 Relationship between memory allocation selection bits and addresses corresponding to chip-select signals
CS
0
and
CS
1
in
memory expansion mode (external bus mode B)
Fig. 72 How to write data in memory allocation control register
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