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參數(shù)資料
| 型號： | M37735S4LHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MICROCONTROLLER, PQFP80 |
| 封裝： | FINE PITCH, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 39/63頁 |
| 文件大?。?/td> | 8367K |
| 代理商： | M37735S4LHP |
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CENTRAL PROCESSING UNIT (CPU)
7733 Group User’s Manual
2–6
2.1.7 Data bank register (DT)
The data bank register consists of 8 bits. In an addressing mode where the data bank register is used, the
contents of this register is processed as the high-order 8 bits (bank) of an address to be accessed, which
consists of 24 bits.
When setting a certain value to this register, execute the LDT instruction.
At reset, this register is cleared to “0016.”
g Addressing modes where the data bank register is used are listed below:
Direct indirect
Direct indexed X indirect
Direct indirect indexed Y
Absolute
Absolute bit
Absolute indexed X
Absolute indexed Y
Absolute bit relative
Stack pointer relative indirect indexed Y
2.1.8 Direct page register (DPR)
The direct page register consists of 16 bits. The contents of this register specifies a direct page area to
bank 016 or an area which extends banks 016 and 116. The direct page area can be accessed with two
bytes (Note) by using the direct page addressing mode.
The contents of the direct page register indicates the base address (the lowest address) of a direct page
area which is extended to 256 bytes above this address.
Values from 000016 to FFFF16 can be set to the direct page register. When a certain value equal to or more
than “FF0116” is set to the direct page register, the direct page area is specified to an area which extends
banks 016 and 116. When the contents of low-order 8 bits of the direct page register is cleared to “0016,”
the number of cycles required to generate the address to be accessed is decremented by 1. Therefore,
efficient access is possible.
At reset, this register is cleared to “000016.”
Figure 2.1.4 shows a setting example of direct page areas.
Note: For the DIV and MPY instructions, the direct page area is accessed with 3 bytes.
When accumulator B is used, for each instruction, the number of instruction bytes is incremented
by 1.
g Addressing modes where the direct page register is used are listed below:
Direct
Direct bit
Direct indexed X
Direct indexed Y
Direct indirect
Direct indexed X indirect
Direct indirect indexed Y
Direct indirect long
Direct indirect long indexed Y
Direct bit relative
2.1 Central processing unit
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M37735T-PAC | 制造商:Renesas Electronics Corporation 功能描述:DEV 7733 SIMPLE DEVELOPMENT TOOL PACKAGE - Bulk |
| M37736EHB | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:PROM VERSION OF M37736EHBXXXGP |
| M37736EHBGS | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:PROM VERSION OF M37736MHBXXXGP |
| M37736EHBXXXGP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:PROM VERSION OF M37736MHBXXXGP(MICROCOMPUTERS) |
| M37736EHL | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:PROM VERSION OF M37736MHLXXXHP(MICROCOMPUTERS) |
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