參數(shù)資料
型號： M37735MHL
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述： 單片16位CMOS微機
文件頁數(shù)： 16/34頁
文件大小： 591K
代理商： M37735MHL
16
MITSUBISHI MICROCOMPUTERS
M37735EHBXXXFP
M37735EHBFS
PROM VERSION OF M37735MHBXXXFP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Limits
Min.
40
15
15
Max.
t
c
t
w(H)
t
w(L)
t
r
t
f
Notes 3.
When the main clock division selection bit = “1”, the minimum value of tc = 80 ns.
4.
When the main clock division selection bit = “1”, values of tw
(H)
/ tc and tw
(L)
/ tc must be set to values from 0.45 through 0.55.
External clock input cycle time (Note 3)
External clock input high-level pulse width (Note 4)
External clock input low-level pulse width (Note 4)
External clock rise time
External clock fall time
ns
ns
ns
ns
ns
8
8
TIMING REQUIREMENTS
(V
CC
= 5 V ± 10%, V
SS
= 0 V, Ta = –20 to 85 °C, f(X
IN
) = 25 MHz, unless otherwise noted (Note))
Notes 1.
This applies when the main clock division selection bit = “0” and f(f
2
) = 12.5 MHz.
2.
Input signal’s rise/fall time must be 100 ns or less, unless otherwise noted.
External clock input
Unit
Symbol
Parameter
Limits
Min.
60
60
60
60
60
60
60
60
60
Max.
t
su(P0D–E)
t
su(P1D–E)
t
su(P2D-E)
t
su(P3D–E)
t
su(P4D–E)
t
su(P5D–E)
t
su(P6D–E)
t
su(P7D–E)
t
su(P8D–E)
t
h(E–P0D)
t
h(E–P1D)
t
h(E–P2D)
t
h(E–P3D)
t
h(E–P4D)
t
h(E–P5D)
t
h(E–P6D)
t
h(E–P7D)
t
h(E–P8D)
Port P0 input setup time
Port P1 input setup time
Port P2 input setup time
Port P3 input setup time
Port P4 input setup time
Port P5 input setup time
Port P6 input setup time
Port P7 input setup time
Port P8 input setup time
Port P0 input hold time
Port P1 input hold time
Port P2 input hold time
Port P3 input hold time
Port P4 input hold time
Port P5 input hold time
Port P6 input hold time
Port P7 input hold time
Port P8 input hold time
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0
0
0
0
0
0
0
0
0
Unit
Symbol
Parameter
Single-chip mode
Limits
Min.
32
55
55
Max.
t
su(D–RDE)
t
su(RDY–
φ
1)
t
su(HOLD–
φ
1)
t
h(RDE–D)
t
h(
φ
1–RDY)
t
h(
φ
1–HOLD)
Data input setup time
input setup time
HOLD
input setup time
input hold time
HOLD
input hold time
ns
ns
ns
ns
ns
ns
0
0
0
Unit
Symbol
Parameter
Memory expansion mode and microprocessor mode
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