- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45036 > M37641M8-XXXFP 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80 PDF資料下載
參數(shù)資料
| 型號(hào)： | M37641M8-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件頁(yè)數(shù)： | 55/136頁(yè) |
| 文件大?。?/td> | 1672K |
| 代理商： | M37641M8-XXXFP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)當(dāng)前第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)
25
7641 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. 20 Structure of timer X mode register
Timer X
Timer X is a 16-bit timer that can be selected in one of four modes.
The timer X’s internal clock and count source can be selected and
a write control is possible by using the timer X mode register.
In all modes the count operation can halt by setting the Timer X
Count Stop Bit to “1”. Additionally, each timer underflow sets the
Interrupt Request Bit to “1”.
(1) Timer Mode
The timer counts the SCSGCLK (Special Count Source Genera-
tor) or one of the internal clock
φ divided by 8, 16, 32, 64.
(2) Pulse Output Mode
Each time the timer underflows, a signal output from the CNTR0
pin is inverted. Except for this, the operation in pulse output mode
is the same as in timer mode.
When the CNTR0 Active Edge Switch Bit is “0”, the CNTR0 pin
starts pulses output beginning at “H”; when this bit is “1”, the
CNTR0 pin starts pulses output beginning at “L”.
When using a timer in this mode, set the port P43 direction regis-
ter to output mode.
(3) Event Counter Mode
The timer counts signals input through the CNTR0 pin.
Except for this, the operation in event counter mode is the same
as in timer mode.
When the CNTR0 Active Edge Switch Bit is “0”, the rising edge is
counted; when this bit is “1”, the falling edge is counted.
When using a timer in this mode, set the port P43 direction regis-
ter to input mode.
(4) Pulse Width Measurement Mode
When the CNTR0 Active Edge Switch Bit is “0”, the timer counts
while the input signal of CNTR0 pin is at “H”; when it is “1”, the
timer counts while the input signal of CNTR0 pin is at “L”.
The timer counts the SCSGCLK or one of the internal clock
φ di-
vided by 8, 16, 32, 64 as its count source.
When using a timer in this mode, set the port P43 direction regis-
ter to input mode.
s Notes
q Timer X Write Control
If the Timer X Write Control Bit is “1”, when the value is written in
the address of timer X, the value is loaded only in the latch. The
value in the latch is loaded in timer X after timer X underflows.
If the Timer X Write Control Bit is “0”, when the value is written in
the address of timer X, the value is loaded in the timer X and the
latch at the same time.
When the value is to be written in latch only, unexpected value
may be set in the high-order timer if the writing in high-order latch
and the underflow of timer X are performed at the same timing.
q CNTR0 Interrupt Active Edge Selection
The CNTR0 interrupt active edge depends on the selection of
CNTR0 Active Edge Switch Bit.
Timer X mode register (address 002716)
TXM
Timer X write control bit
0: Write value in latch and counter
1: Write value in latch only
Timer X count source select bits
b2b1
0 0:
φ / 8
0 1:
φ / 16
1 0:
φ / 32
1 1:
φ / 64
Timer X internal clock select bit
0:
φ / n (n = 8, 16, 32, 64)
1: SCSGCLK (Special Count Source Generator)
Timer X operating mode bits
b5b4
0 0: Timer mode
0 1: Pulse output mode
1 0: Event counter mode
1 1: Pulse width measurement mode
CNTR0 active edge switch bit
0: Count at rising edge in event counter mode
Start from “H” output in pulse output mode
Measure “H” pulse width in pulse width
measurement mode
Falling edge active for interrupt
1: Count at falling edge in event counter mode
Start from “L” output in pulse output mode
Measure “L” pulse width in pulse width
measurement mode
Rising edge active for interrupt
Timer X count stop bit
0: Count start
1: Count stop
b0
b7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37643M8-XXXFP | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80 |
| M37643F8HP | 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP80 |
| M37643M8-XXXHP | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80 |
| M37700M2-XXXFP | 16-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80 |
| M37701M2-001SP | 16-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37641M8-XXXHP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M376420RS | 制造商:OKI 功能描述:3764-20 NOTES |
| M3764-20RS | 制造商:OKI 功能描述:3764-20 NOTES 制造商: 功能描述:Dynamic RAM, Page Mode, 64K x 1, 16 Pin, Plastic, DIP 制造商:OK International 功能描述:Dynamic RAM, Page Mode, 64K x 1, 16 Pin, Plastic, DIP |
| M3-7643A-S | 制造商:Harris Corporation 功能描述: |
| M37643F8E8-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。