參數(shù)資料
型號: M37641F8-XXXFP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁數(shù): 55/149頁
文件大?。?/td> 1997K
代理商: M37641F8-XXXFP
55
7641 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
[USB Endpoint x (x = 1 to 4) OUT Control Register] OUT_CSR
This register contains the information and status of the respective
OUT endpoints 1 to 4. In the endpoint 0, all bits are reserved and
cannot be used (they will all be read out as
0
). The USB FCU
sets the OUT_PKT_RDY flag to
1
after a data packet has been
received into the OUT FIFO. After reading the data packet in the
OUT FIFO, clear this flag to
0
. However, if there is still data in the
OUT FIFO, the flag cannot be cleared even by writing
0
by soft-
ware.
U
O
S
U
B
T
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C
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t
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U
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(
a
d
d
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e
s
s
0
0
5
A
1
6
)
INT_PKT_RDY bit (OUTXCSR0)
0: Except the following condition (
Note 3
)
1: End of a data packet reception (
Note 2
)
OVER RUN flag (OUTXCSR1) (In isochronous data transfer)
0: No FIFO overrun (
Note 2
)
1: FIFO overrun occurred (
Note 1
)
SEND_STALL bit (OUTXCSR2) (
Note 2
)
0: Except the following condition
1: Transmitting STALL handshake signal
ISO/TOGGLE bit (OUTXCSR3) (
Note 2
)
0: Except the following condition
1: Initializing to endpoint used for isochronous transfer;
Enabling reception of DATA0 and DATA1 as PID (Initializing the
toggle)
FORCE_STALL flag (OUTXCSR4)
0: Except the following condition (
Note 2
)
1: Protocol error detected (
Note 1
)
DATA_ERR flag (OUTXCSR5)
0: Except the following condition (
Note 2
)
1: CRC or bit stuffing error detected in transferring isochronous data
(
Note 1
)
FLUSH bit (OUTXCSR6)
0: Except the following condition (
Note 1
)
1: Flush FIFO. (
Note 2
)
AUTO_CLR bit (OUTXCSR7) (
Note 2
)
0: AUTO_CLR disabled
1: AUTO_CLR enabled
b0
b7
Notes 1
: This bit is automatically set to
1
or cleared to
0
.
2
: The user must program to
1
or
0
.
3
: When AUTO_CLR bit is
0
, the user must clear to
0
. When AUTO_CLR bit is
1
, this
bit is automatically cleared to
0
.
Fig. 48 Structure of USB endpoint x (x = 1 to 4) OUT control register
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