參數(shù)資料
型號(hào): M37548G1FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO20
封裝: 4.40 X 6.50 MM, 0.65 MM PITCH, PLASTIC, LSSOP-20
文件頁(yè)數(shù): 7/84頁(yè)
文件大小: 1427K
代理商: M37548G1FP
Rev.2.02
Mar 31, 2009
Page 15 of 81
REJ03B0210-0202
7548 Group
I/O Ports
[Direction registers] PiD
The I/O ports have direction registers which determine the input/
output direction of each pin. Each bit in a direction register
corresponds to one pin, and each pin can be set to be input or
output.
When “1” is set to the bit corresponding to a pin, this pin
becomes an output port. When “0” is set to the bit, the pin
becomes an input port.
When data is read from a pin set to output, not the value of the
pin itself but the value of port latch is read. Pins set to input are
floating, and permit reading pin values.
If a pin set to input is written to, only the port latch is written to
and the pin remains floating.
If the port P20 is used as output port, write “1” to the port
P20 direction register after reset.
Set “1” to bits 6 and 7 of the port P1 direction register.
Set “1” to bits 0 and 1 of the port P3 direction register.
[Port P0 drive capacity control register] DCCR
By setting the Port P0 drive capacity control register (address
000C16), the drive capacity of the N-channel output transistor for
the port P0 can be selected.
[Pull-up control registers] PULL0, PULL1
By setting the pull-up control registers (address 000D16 and
000E16), ports P0 and P1 can exert pull-up control by program.
However, this is valid only when the port direction registers are
set to input.
When they are set to output, setting “pull-up on” does not pull up
the ports.
Fig 13. Structure of port P0 drive capacity control
register
Fig 14. Structure of port P0 pull-up control register
Fig 15. Structure of port P1 control register
Fig 16. Structure of port P3 direction register
b7
b0
Port P00 drive capacity selection bit
Port P01 drive capacity selection bit
Port P02 drive capacity selection bit
Port P03 drive capacity selection bit
Port P04 drive capacity selection bit
Port P05 drive capacity selection bit
Port P06 drive capacity selection bit
Port P07 drive capacity selection bit
0: weakness
1: strength
Port P0 drive capacity control register
(DCCR: address 000C16, initial value: 0016)
b7
b0
P00 pull-up control bit
P01 pull-up control bit
P02 pull-up control bit
P03 pull-up control bit
P04 pull-up control bit
P05 pull-up control bit
P06 pull-up control bit
P07 pull-up control bit
0: Pull-up is disabled
1: Pull-up is enabled
Port P0 pull-up control register
(PULL0: address 000D16, initial value: 0016)
b7
b0
P10 pull-up control bit
P11 pull-up control bit
P12 pull-up control bit
P13 pull-up control bit
P14 pull-up control bit
P15 pull-up control bit
Set “0” to these bits certainly
0: Pull-up OFF
1: Pull-up ON
Port P1 pull-up control register
(PULL1: address 000E16, initial value: 0016)
b7
b0
Set “1” to these bits certainly
Not used (returns “0” when read)
Port P3 direction register
(P3D: address 000716, initial value: 0016)
Note: Set “0316” to the port P3 direction register, though the port P3 pins are
nothing.
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M37548G3FP#U0 功能描述:MCU 6K ROM 256K 20-SSOP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器, 系列:740/38000 標(biāo)準(zhǔn)包裝:250 系列:LPC11Uxx 核心處理器:ARM? Cortex?-M0 芯體尺寸:32-位 速度:50MHz 連通性:I²C,Microwire,SPI,SSI,SSP,UART/USART,USB 外圍設(shè)備:欠壓檢測(cè)/復(fù)位,POR,WDT 輸入/輸出數(shù):40 程序存儲(chǔ)器容量:96KB(96K x 8) 程序存儲(chǔ)器類型:閃存 EEPROM 大小:4K x 8 RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):1.8 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-LQFP 包裝:托盤(pán) 其它名稱:568-9587