
REJ03B0160-0122 Rev.1.22 Mar 13, 2009
page 87 of 100
7546 Group
Timing requirements (3)
(VCC = 2.2 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Min.
Typ.
Max.
Symbol
Parameter
Limits
Unit
Reset input “L” pulse width
External clock input cycle time
External clock input “H” pulse width
External clock input “L” pulse width
CNTR0 input cycle time
CNTR0, INT0, INT1, CAP0, CAP1 input “H” pulse width (Note 1)
CNTR0, INT0, INT1, CAP0, CAP1 input “L” pulse width (Note 1)
Serial I/O1, serial I/O2 clock input cycle time (Note 2)
Serial I/O1, serial I/O2 clock input “H” pulse width (Note 2)
Serial I/O1, serial I/O2 clock input “L” pulse width (Note 2)
Serial I/O1, serial I/O2 input set up time
Serial I/O1, serial I/O2 input hold time
tW(RESET)
tC(XIN)
tWH(XIN)
tWL(XIN)
tC(CNTR0)
tWH(CNTR0)
tWL(CNTR0)
tC(SCLK1)
tWH(SCLK1)
tWL(SCLK1)
tsu(RxD1–SCLK1)
th(SCLK1–RxD1)
2
500
200
1000
460
4000
1900
800
400
s
ns
Notes 1: As for CAP0, CAP1, it is the value when noise filter is not used.
2: In this time, bit 6 of the serial I/O1 control register (address 001A16) is set to “1” (clock synchronous serial I/O is selected).
When bit 6 of the serial I/O1 control register is “0” (clock asynchronous serial I/O1 is selected), the rating values are divided by 4.
In this time, bit 6 of the serial I/O2 control register (address 003016) is set to “1” (clock synchronous serial I/O is selected).
When bit 6 of the serial I/O2 control register is “0” (clock asynchronous serial I/O is selected), the rating values are divided by 4.