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參數(shù)資料
| 型號： | M37542F8SP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP32 |
| 封裝： | 8.9 X 28 MM, 1.78 MM PITCH, PLASTIC, SDIP-32 |
| 文件頁數(shù)： | 25/124頁 |
| 文件大?。?/td> | 1238K |
| 代理商： | M37542F8SP |
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REVISION HISTORY
Rev.
Date
Description
Page
Summary
7542 Group Datasheet
1.00 Nov 27, 2002
2.00 Apr 21, 2003
2.01 Dec 03, 2003
2.02 Jan 06, 2004
First edition issued
FEATURES; Memory size revised.
Memory size; Flash memory size revised.
Fig.8; ROM size revised.
Table 2; ROM size revised.
Central Processing Unit (CPU); Description revised.
Fig.26; Port P03 direction register revised.
Fig.42; Modulation output revised.
Fig.43; Modulation output revised.
Reset Circuit; Description revised.
(3) RC oscillation; Description revised.
(1) Oscillation control
Stop mode
Description about FLASH added.
Fig.77; revised.
FLASH MEMORY MODE added.
ELECTRICAL CHARACTERISTICS added.
FEATURES: Interrupt, Power source voltage, Power dissipation revised.
Fig. 8: Development schedule revised.
Table 2: ROM size for Flash memory version revised.
Fig. 12: Note added.
Fig. 14: Flash memory control register 2 added.
Fig. 26: “CPU mode register” added, description for timer 1 interrupt request revised.
Fig. 29: “CPU mode register” added.
Fig. 37 and Fig. 38: Pin name added.
Fig. 39: Pin name added.
Fig. 46 and Fig. 47: Pin name added.
A-D Converter revised.
Fig. 70 Flash memory control register 2 added.
Fig. 79 (5), (6) revised.
■ A-D Converter revised.
DATA REQUIRED FOR MASK ORDERS revised.
Description of flash memory control register 0 (bit 2), Fig. 83 revised.
Description of flash memory control register 2, Fig. 85 and Table 8 added.
Fig. 86 revised.
Table 9 revised.
ELECTRICAL CHARACTERISTICS;
General purpose revised.
Extended operating temperature version added.
FEATURES: The minimum instruction execution time revised.
Note 2 eliminated.
Stack pointer (S): Reference number of Figure in description revised.
Table 12: P07 (BUSY output) added.
Fig. 95: “BUSY” added to P07.
Fig. 96, Fig. 97: “BUSY” added to P07.
Fig. 98, Fig. 99: CNVSS revised.
Table 19, Table 20 Timing requirements (General purpose)
Vcc for FLASH ROM version and Mask ROM version revised.
Table 22, Table 23 Switching characteristics (General purpose)
Vcc for FLASH ROM version and Mask ROM version revised.
–
1
8
9
10
28
36
37
53
55
56
57
65 to 72
73 to 82
1
8
9
13
15
28
30
33
34
40
51
54
59
64
65
68
69
70
71
85 to103
1
10
79
82
83
84
91
93
A - 1
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M37542F8SP#U0 | 制造商:Renesas Electronics Corporation 功能描述:MCU 4.0/5.5V 32K PB-FREE 32-SDIP - Trays |
| M37542M2-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37542M2-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37542M2-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37542M2-XXXSP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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