參數資料
型號: M37542F4FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO36
封裝: 8.4 X 15 MM, 0.80 MM PITCH, PLASTIC, SSOP-36
文件頁數: 90/124頁
文件大小: 1238K
代理商: M37542F4FP
7542 Group
Rev.3.03
Jul 11, 2008
Page 66 of 117
REJ03B0006-0303
Fig. 85 Structure of MISRG
● Oscillation stop detection circuit
The oscillation stop detection circuit is used to detect an oscilla-
tion stop when a ceramic resonator or oscillation circuit stops due
to disconnection. To use the oscillation stop detection circuit, set
the on-chip oscillator to start operating.
The oscillation stop detection circuit is enabled by setting the Ce-
ramic or RC oscillation stop detection function active bit to 1.
While this circuit is enabled, the operating status of the Ceramic or
RC oscillation circuit is monitored using the on-chip oscillator. If an
oscillation stop is detected, the oscillation stop detection status bit
is set to 1. If the oscillation stop detection reset enable bit is also
set to 1, an internal reset is triggered at oscillation stop detection.
The Ceramic or RC oscillation stop detection function active bit
and the oscillation stop detection status bit are not initialized if an
oscillation stop detection reset is triggered and these bits retain
their value of 1. Since these bits are initialized to 0 by an external
reset, an oscillation stop detection reset can be determined by
checking the oscillation stop status bit.
The oscillation stop detection status bit is set to 0 by writing 0 to
the Ceramic or RC oscillation stop detection function active bit.
To enable the oscillation detection circuit, first write 0 to the Ce-
ramic or RC oscillation stop detection function active bit and set
the oscillation stop detection status bit to 0. Then set the Ceramic
or RC oscillation stop detection function active bit to 1.
The Ceramic oscillation, RC oscillation, and external clock input
are set as the clocks for oscillation stop detection. Refer to the
electrical characteristics for the frequencies for oscillation stop de-
tection.
■ Notes on Oscillation Stop Detection Circuit
(1) Do not execute the transition to “state 2’a” shown in Figure 86
State transition of oscillation stop detection circuit. In this state,
no reset is triggered and the MCU is stopped even when the
XIN oscillation is stopped.
(2) After an oscillation stop detection reset, if this reset is enabled
while bits Ceramic or RC oscillation stop detection function ac-
tive and oscillation stop detection status are retained, a reset
is triggered again.
(3) The oscillation stop detection status bit is initialized under the
following conditions:
External reset, power-on reset, low-voltage detection reset,
watchdog timer reset, and reset by the STP instruction func-
tion.
Write 0 to the Ceramic or RC oscillation stop detection func-
tion active Bit.
(4) While the oscillation stop detection function is in active, the os-
cillation stop detection status bit may set to 1 when the
watchdog timer underflow.
When an oscillation stop detection reset is triggered, reconfirm
that oscillation is stopped.
(5) The oscillation stop detection circuit is not included in the emu-
lator MCU “M37542RSS”.
MISRG(address 003816, initial value: 0016)
b7
b0
Oscillation stabilization time set bit after
release of the STP instruction
0: Set “0116” in timer1, and “FF16
in prescaler 1 automatically
1: Not set automatically
Reserved bits
(Do not write “1” to these bits)
Not used (return “0” when read)
Oscillation stop detection status bit
0: Oscillation stop not detected
1: Oscillation stop detected
Oscillation stop reset bit
0: Oscillation stop reset disabled
1: Oscillation stop reset enabled
Ceramic or RC oscillation stop
detection function active bit
0: Detection function inactive
1: Detection function active
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