參數(shù)資料
型號(hào)： M37532E8FP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO36
封裝： 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-36
文件頁數(shù)： 37/51頁
文件大?。?/td> 736K
代理商： M37532E8FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7532 Group
MITSUBISHI MICROCOMPUTERS
41
Electrical Characteristics
Table 9 Electrical characteristics (1) (VCC = 4.1 to 5.5 V, VSS = 0 V, Ta = –20 to 85
°C, unless otherwise noted)
Min.
Typ.
Max.
Symbol
Parameter
Limits
Unit
IOH = –5 mA
VCC = 4.1 to 5.5 V
IOH = –1.0 mA
VCC = 4.1 to 5.5 V
VCC = 4.40 to 5.25 V
Pull-down through
15k
±5% for D+, D-
Pull-up through 1.5k
±5% by USBVREFOUT
for D- (Ta = 0 to 70
°C)
IOL = 5 mA
VCC = 4.1 to 5.5 V
IOL = 1.5 mA
VCC = 4.1 to 5.5 V
VCC = 4.40 to 5.25 V
Pull-down through
15k
±5% for D+, D-
Pull-up through 1.5k
±5% by USBVREFOUT
for D- (Ta = 0 to 70
°C)
IOL = 15 mA
VCC = 4.1 to 5.5 V
IOL = 1.5 mA
VCC = 4.1 to 5.5 V
VI = VCC
(Pin floating. Pull up
transistors “off”)
VI = VCC
VI = VSS
(Pin floating. Pull up
transistors “off”)
VI = VSS
(Pull up transistors“on”)
Test conditions
VCC–1.5
VCC–1.0
2.8
“H” output voltage P00–P07, P10–P14, P20–P27,
P30–P35, P37 (Note 1)
“H” output voltage D+, D-
“L” output voltage P00–P07, P10–P14, P20–P27,
P37
“L” output voltage D+, D-
“L” output voltage P30–P35
Hysteresis
D+, D–
Hysteresis
CNTR0, INT0 (Note 2),
P00–P07(Note 3)
Hysteresis
RXD, SCLK, SDATA (Note 2)
Hysteresis
RESET
“H” input current
P00–P07, P10–P14, P20–P27,
P30–P35, P37
“H” input current
RESET
“H” input current
XIN
“L” input current
P00–P07, P10–P14, P20–P27,
P30–P35, P37
“L” input current
RESET, CNVSS
“L” input current
XIN
“L” input current
P00–P07, P30–P35, P37
RAM hold voltage
V
VOH
3.6
V
VOL
0.3
1.5
V
VOL
0.3
V
VOL
2.0
0.3
V
VT+–VT–
IIH
When clock stopped
V
0.5
4
–4
–0.2
5.0
–5.0
–0.5
V
A
mA
2.0
5.5
V
VT+–VT–
IIL
IIH
IIL
VRAM
Note 1: P11 is measured when the P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
2: RXD, SCLK, SDATA, and INT0 have hysteresises only when bits 0 and 2 of the port P1P3 control register are set to “0” (CMOS level).
3: It is available only when operating key-on wake-up.
0.4
0.15
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