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| 型號(hào)： | M37531E4V-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP32 |
| 封裝： | 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32 |
| 文件頁(yè)數(shù)： | 35/216頁(yè) |
| 文件大小： | 1400K |
| 代理商： | M37531E4V-XXXGP |
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7531 Group User’s Manual
iv
List of figures
Fig. 3.2.11 VOH-IOH characteristic example of P-channel (Ta = 25
°C): normal port........ 3-30
Fig. 3.2.12 VOH-IOH characteristic example of P-channel (Ta = 90
°C): normal port........ 3-30
Fig. 3.2.13 VOL-IOL characteristic example of N-channel (Ta = 25
°C): normal port ........ 3-31
Fig. 3.2.14 VOL-IOL characteristic example of N-channel (Ta = 90
°C): normal port ........ 3-31
Fig. 3.2.15 VOL-IOL characteristic example of N-channel (Ta = 25
°C): LED drive port ... 3-32
Fig. 3.2.16 VOL-IOL characteristic example of N-channel (Ta = 90
°C): LED drive port ... 3-32
Fig. 3.2.17 “L” input current when connecting pull-up transistor .......................................... 3-33
Fig. 3.2.18 RC oscillation characteristic example .................................................................... 3-33
Fig. 3.2.19 Definition of A-D conversion accuracy .................................................................. 3-34
Fig. 3.2.20 A-D conversion accuracy typical characteristic example-1 ................................ 3-35
Fig. 3.2.21 A-D conversion accuracy typical characteristic example-2 ................................ 3-36
Fig. 3.3.1 Sequence of switch the detection edge .................................................................. 3-37
Fig. 3.3.2 Sequence of check of interrupt request bit ............................................................ 3-37
Fig. 3.3.3 Structure of interrupt control register 1 .................................................................. 3-38
Fig. 3.3.4 Sequence of clearing serial I/O ............................................................................... 3-38
Fig. 3.3.5 Initialization of processor status register ................................................................ 3-41
Fig. 3.3.6 Sequence of PLP instruction execution .................................................................. 3-41
Fig. 3.3.7 Stack memory contents after PHP instruction execution ..................................... 3-41
Fig. 3.3.8 Status flag at decimal calculations .......................................................................... 3-42
Fig. 3.3.9 Programming and testing of One Time PROM version ........................................ 3-43
Fig. 3.3.10 Switching method of CPU mode register ............................................................. 3-46
Fig. 3.4.1 Selection of packages ............................................................................................... 3-47
Fig. 3.4.2 Wiring for the RESET pin ......................................................................................... 3-47
Fig. 3.4.3 Wiring for clock I/O pins ........................................................................................... 3-48
Fig. 3.4.4 Wiring for CNVSS pin ............................................................................................... 3-48
Fig. 3.4.5 Wiring for the VPP pin of the One Time PROM and the EPROM version ........ 3-49
Fig. 3.4.6 Bypass capacitor across the VSS line and the VCC line ...................................... 3-49
Fig. 3.4.7 Analog signal line and a resistor and a capacitor ................................................ 3-50
Fig. 3.4.8 Wiring for a large current signal line ...................................................................... 3-50
Fig. 3.4.9 Wiring of signal lines where potential levels change frequently ......................... 3-51
Fig. 3.4.10 VSS pattern on the underside of an oscillator ..................................................... 3-51
Fig. 3.4.11 Setup for I/O ports ................................................................................................... 3-52
Fig. 3.4.12 Watchdog timer by software ................................................................................... 3-53
Fig. 3.5.1 Structure of Port Pi (i = 0, 2, 3) .............................................................................. 3-54
Fig. 3.5.2 Structure of Port P1 ................................................................................................... 3-54
Fig. 3.5.3 Structure of Port Pi direction register (i = 0, 2, 3) ............................................... 3-55
Fig. 3.5.4 Structure of Port P1 direction register .................................................................... 3-55
Fig. 3.5.5 Structure of Pull-up control register ........................................................................ 3-56
Fig. 3.5.6 Structure of Port P1P3 control register .................................................................. 3-56
Fig. 3.5.7 Structure of Transmit/Receive buffer register ........................................................ 3-57
Fig. 3.5.8 Structure of Serial I/O1 status register ................................................................... 3-57
Fig. 3.5.9 Structure of Serial I/O1 control register .................................................................. 3-58
Fig. 3.5.10 Structure of UART control register ........................................................................ 3-58
Fig. 3.5.11 Structure of Baud rate generator ........................................................................... 3-59
Fig. 3.5.12 Structure of Prescaler 12, Prescaler X ................................................................. 3-59
Fig. 3.5.13 Structure of Timer 1 ................................................................................................ 3-60
Fig. 3.5.14 Structure of Timer 2 ................................................................................................ 3-60
Fig. 3.5.15 Structure of Timer X mode register ...................................................................... 3-61
Fig. 3.5.16 Structure of Timer X ................................................................................................ 3-62
Fig. 3.5.17 Structure of Timer count source set register ....................................................... 3-62
Fig. 3.5.18 Structure of Serial I/O2 control register ................................................................ 3-63
Fig. 3.5.19 Structure of Serial I/O2 register ............................................................................. 3-63
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37531M4T-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32 |
| M37531M4V-XXXGP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP32 |
| M37531E8FP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDSO36 |
| M37531E4GP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP32 |
| M37531E8SP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP32 |
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| M37531E8FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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