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    參數(shù)資料
    型號(hào): M37515M4-C05HP
    廠商: Mitsubishi Electric Corporation
    英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
    中文描述: 單芯片8位CMOS微機(jī)
    文件頁(yè)數(shù): 32/54頁(yè)
    文件大小: 749K
    代理商: M37515M4-C05HP
    32
    M37515M4-XXXHP
    SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
    MITSUBISHI MICROCOMPUTERS
    A-D CONVERTER
    [A-D Conversion Registers (ADL, ADH)]
    0035
    16
    , 0036
    16
    The A-D conversion registers are read-only registers that store the
    result of an A-D conversion. Do not read these registers during an
    A-D conversion
    [AD Control Register (ADCON)] 0034
    16
    The AD control register controls the A-D conversion process. Bits
    0 to 2 select a specific analog input pin. Bit 4 indicates the
    completion of an A-D conversion. The value of this bit remains at
    “0” during an A-D conversion and changes to “1” when an A-D
    conversion ends. Writing “0” to this bit starts the A-D conversion.
    Comparison Voltage Generator
    The comparison voltage generator divides the voltage between
    AV
    SS
    and V
    REF
    into 1024 and outputs the divided voltages.
    Channel Selector
    The channel selector selects one of ports P3
    0
    /AN
    0
    to P3
    7
    /AN
    7
    and
    inputs the voltage to the comparator.
    Comparator and Control Circuit
    The comparator and control circuit compare an analog input volt-
    age with the comparison voltage, and the result is stored in the
    A-D conversion registers. When an A-D conversion is completed,
    the control circuit sets the A-D conversion completion bit and the
    A-D interrupt request bit to “1”.
    Note that because the comparator consists of a capacitor cou-
    pling, set f(X
    IN
    ) to 500 kHz or more during an A-D conversion.
    Fig. 35 Structure of AD control register
    Fig. 36 Structure of A-D conversion registers
    AD control register
    (ADCON : address 0034
    16
    )
    Analog input pin selection bits
    0 0 0: P3
    0
    /AN
    0
    0 0 1: P3
    1
    /AN
    1
    0 1 0: P3
    2
    /AN
    2
    0 1 1: P3
    3
    /AN
    3
    1 0 0: P3
    4
    /AN
    4
    1 0 1: P3
    5
    /AN
    5
    1 1 0: P3
    6
    /AN
    6
    1 1 1: P3
    7
    /AN
    7
    Not used (returns “0” when read)
    A-D conversion completion bit
    0: Conversion in progress
    1: Conversion completed
    Not used (returns “0” when read)
    b7
    b0
    10-bit reading
    (Read address 0036
    16
    before 0035
    16
    )
    (Address 0036
    16
    )
    (Address 0035
    16
    )
    8-bit reading (Read only address 0035
    16
    )
    (Address 0035
    16
    )
    b8
    b7 b6 b5 b4 b3 b2 b1 b0
    b7
    b0
    b9
    b7
    b0
    Note :
    The high-order 6 bits of address 0036
    16
    become “0”
    at reading.
    b9 b8 b7 b6 b5 b4 b3 b2
    b7
    b0
    C
    A-D control circuit
    A-D conversion low-order register
    Resistor ladder
    V
    REF
    AV
    SS
    Comparator
    A-D interrupt request
    b7
    b0
    3
    10
    P3
    0
    /AN
    0
    P3
    1
    /AN
    1
    P3
    2
    /AN
    2
    P3
    3
    /AN
    3
    P3
    4
    /AN
    4
    P3
    5
    /AN
    5
    P3
    6
    /AN
    6
    P3
    7
    /AN
    7
    Data bus
    AD control register
    (Address 0034
    16
    )
    A-D conversion high-order register
    (Address 0036
    16
    )
    (Address 0035
    16
    )
    Fig. 37 Block diagram of A-D converter
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