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參數(shù)資料
| 型號： | M37510E6-FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP176 |
| 封裝： | 24 X 24 MM, FINE PITCH, PLASTIC, QFP-176 |
| 文件頁數(shù)： | 40/43頁 |
| 文件大?。?/td> | 614K |
| 代理商： | M37510E6-FP |
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6
7510 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
FUNCTIONAL DESCRIPTION
CENTRAL PROCESSING UNIT (CPU)
The 7510 group uses the standard 740 family instruction set. Re-
fer to the table of 740 family addressing modes and machine
instructions or the SERIES 740 <Software> User’s Manual for de-
tails on the instruction set.
Machine-resident 740 family instructions are as follows:
The FST and SLW instruction are not available for use.
The STP, WIT, MUL, and DIV instruction can be used.
Fig. 1 Structure of CPU mode register
CPU MODE REGISTER
The CPU mode register is allocated at address 003B16.
The CPU mode register contains the stack page selection bit and
the internal system clock selection bit.
(CPUM : address 003B16)
b7
CPU mode register
Processor mode bits
b1 b0
0 0 : Single-chip mode
0 1 : Do not use
1 0 : Do not use
1 1 : Do not use
Stack page selection bit
0 : RAM in the zero page is used as stack area
1 : RAM in page 1 is used as stack area
XCOUT drivability selection bit
0 : Low drive
1 : High drive
Port XC selection bit
0 : I/O port
1 : XCIN, XCOUT
Main clock (XIN-XOUT) stop bit
0 : Operating
1 : Stopped
Main clock division ratio selection bit
0 : XIN/2 (high-speed mode)
1 : XIN/8 (middle-speed mode)
Internal system clock selection bit
0 : XIN-XOUT selected (middle/high-speed mode)
1 : XCIN-XCOUT selected (low-speed mode)
b0
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