參數(shù)資料
型號(hào)： M37481MXT
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 39/97頁
文件大?。?/td> 1076K
代理商： M37481MXT
39
MITSUBISHI MICROCOMPUTERS
7480/7481 GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Watchdog Timer
The watchdog timer gives a means for returning to a reset status
when the program fails to run on its normal loop due to a runaway.
The watchdog timer consists of a 7-bit watchdog timer L and an 8-
bit watchdog timer H.
G
Initial Value of Watchdog Timer
By a reset or writing to the watchdog timer H, the watchdog timer
H is set to “FF
16
” and the watchdog timer L is set to “7F
16
”. Any in-
struction that permits generating a write signal can be used; for
example, STA, LDM, CLB, etc. Write data has no significance, so
the above values are set regardless of that data.
G
Operation of Watchdog Timer
The watchdog timer stops at reset, and writing a value in the
watchdog timer H causes it to start to count down. When bit 7 of
the watchdog timer H becomes “0”, an internal reset occurs.
The reset status is released as soon as the release reset time is
up. After that, the 7480/7481 group runs the program from the re-
set vector address. It is programmed that the watchdog timer H
can be set before bit 7 of the watchdog timer H is cleared to “0”. If
the watchdog timer H is never written, the watchdog timer does
not function. When the STP instruction is executed, the clock
stops and the watchdog timer also stops. The count is restarted as
soon as the stop mode is released. (Note) On the other hand, the
watchdog timer does not stop after execution of the WIT instruc-
tion.
The timing from writing to the watchdog timer H to clearing bit 7 of
the watchdog timer H to “0” is shown below. (f(X
IN
)=8 MHz)
When bit 3 of the CPU mode register is “0”.............16.384 ms
When bit 3 of the CPU mode register is “1”............ 32.768 ms
Note: Since the watchdog timer still counts for the stop release
waiting time (about 2048 cycles of X
IN
), bit 7 of the watch-
dog timer H should not be cleared to “0” in this period.
Fig. 40 Block diagram of watchdog timer
Watchdog timer L (7)
Watchdog timer H (8)
1/8
1/16
“0”
“1”
Watchdog timer L count
source selection bit
Write “7F
16
” to the
watchdog timer register
Write “FF
16
” to the
watchdog timer register
Data bus
Reset circuit
Internal reset
RESET
f(X
IN
)
bit7
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參數(shù)描述
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M37481RSS 功能描述:EPROM MCU/8BIT CMOS EMULATION CH RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 配件 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 標(biāo)準(zhǔn)包裝:1 系列:- 附件類型:USB 至 1-Wire? RJ11 適配器 適用于相關(guān)產(chǎn)品:1-Wire? 設(shè)備 產(chǎn)品目錄頁面:1429 (CN2011-ZH PDF)
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