
7480 Group and 7481 Group User's Manual
1-122
1.14 Serial I/O
HARDWARE
Figure 1.14.14 Setting of Clock Synchronous Serial I/O (2)
b7
b0
b7
b0
00
11
Serial I/O receive interrupt request bit (when receiving)
Procedure 5 Setting interrupt when serial I/O transmit/receive interrupt is used (Note 3)
Interrupt request register 1 (IREQ1) [Address 00FC16]
1. ‘0’ is set to serial I/O transmit/receive interrupt request bit
Serial I/O transmit interrupt request bit (when transmitting)
Serial I/O receive interrupt enabled (when receiving)
Interrupt control register 1 (ICON1) [Address 00FE16]
2. Serial I/O transmit/receive interrupt is enabled
Serial I/O transmit interrupt enabled (when transmitting)
Procedure 6 Start of data transmit/receive
Transmit buffer register (TB) [Address 00E016]
Writing transmit data when transmitting (Note 4)
Writing dummy data when receiving half-duplex communication
Notes 3: Refer to
Handling when overrun error is generated in
(5) Notes on Usage of Clock Synchronous Serial I/O.
Notes 4: Keep SCLK pin input HIGH when writing transmit data to transmit buffer register
to select the external clock input as the synchronous clock.