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參數(shù)資料
| 型號(hào)： | M37470M4-768SP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 19/46頁 |
| 文件大?。?/td> | 646K |
| 代理商： | M37470M4-768SP |
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19
7470/7471 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. 10 Structure of serial I/O mode register
BYTE SPECIFY MODE
The serial I/O has a byte specify mode that allows one specific
byte data to be selected for transmission or reception when serial
I/O circuits of two or more microcomputers are connected to send
or receive data through one bus. The data to be sent or received
can be specified by writing a value into the byte counter. The value
written in the byte counter is decremented by one each time eight
cycles of transfer clock are input. When the value in the byte
counter becomes “0”, serial transmission/reception is done by the
next eight cycles of transfer clock. When the value in the byte
counter is not “0”, the output on the S
OUT
pin is driven “H” by the
falling edge of the first transfer clock pulse to inhibit transmission/
reception.
Serial I/O interrupt requests are generated only when serial trans-
mission/reception is done after the value in the byte counter is
decremented to “0”. When the SA
RDY
signal output is selected, the
SA
RDY
signal is driven “L” by the last rising edge of the transfer
clock after the value in the byte counter is decremented to “0”.
Note that in the byte mode, an external clock must be used as the
sync. clock for the purpose of the mode.
b7
b0
Serial I/O mode register (SM)
(Address 00DC
16
)
Synchronous clock selection bit
0 : External clock
1 : Internal clock
Internal clock selection bits
00 : f(X
IN
) or f(Xc
IN
) divided by 8
01 : f(X
IN
) or f(Xc
IN
) divided by 16
10 : f(X
IN
) or f(Xc
IN
) divided by 32
11 : f(X
IN
) or f(Xc
IN
) divided by 512
Serial I/O port selection bit
0 : Normal I/O port
1 : S
OUT
, CLK pins
Note :
Do not select f(X
CIN
) as the count source in the 7470 group.
Serial I/O byte specify mode selection bit
0 : Normal mode
1 : Byte specify mode
S
RDY
signal output selection bit
0 : Normal I/O port
1 : S
RDY
signal output pin
S
RDY
signal selection bit
0 : S
RDY
signal
1 : SA
RDY
signal
P1
5
/S
OUT,
P1
7
/S
RDY
output structure selection bit
0 : CMOS output
1 : N-channel open drain output
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