參數(shù)資料
型號(hào)： M37274MA-052SP
廠商： Mitsubishi Electric Corporation
英文描述： PHOTO SM DETECTOR
中文描述： 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù)： 135/147頁
文件大?。?/td> 2042K
代理商： M37274MA-052SP
135
MITSUBISHI MICROCOMPUTERS
M37274EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
PRELIMINARY
Notice: This is not a final specification.
Some paramentic limits are subject to change.
Interrupt Control Register 1
Interrupt Request Register 2
Address 00FD
16
Address 00FE
16
b7b6 b5b4b3 b2b1b0
0
Interrupt request register 2 (IREQ2) [Address 00FD
B
0
Name
Functions
After reset
R W
Interrupt Request Register 2
INT1 interrupt
request bit (INT1R)
Data slicer interrupt
request bit (DSR)
Serial I/O interrupt
request bit (SIOR)
f(X
IN
)/4096 interrupt
request bit (1MSR)
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
1
2
3
4
INT2 interrupt
request bit (INT2R)
Multi-master I
2
C-BUS
interrupt request bit (IICR)
5
7
Fix this bit to “0.”
0
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
8
: “0” can be set by software, but “1” cannot be set.
0
0
8
0
0
8
0
8
0
8
16
]
R
R
R
R
8
R
R
8
R W
6
Timer 5 6 interrupt
request bit (T56R)
0 : No interrupt request issued
1 : Interrupt request issued
0
8
R
b7b6 b5b4b3 b2b1b0
Interrupt control register 1 (ICON1) [Address 00FE
16
]
B
0
Name
Functions
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
After reset
R W
0
Interrupt Control Register 1
Timer 1 interrupt
enable bit (TM1E)
Timer 2 interrupt
enable bit (TM2E)
Timer 3 interrupt
enable bit (TM3E)
Timer 4 interrupt
enable bit (TM4E)
1
2
3
4
OSD interrupt enable bit
(CRTE)
V
SYNC
interrupt enable
bit (VSCR)
A-D conversion INT3
interrupt enable bit (ADE)
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0
0
0
0
0
R W
R W
R W
R W
R W
R —
7
Nothing is assigned. This bit is a write disable
bit. When this bit is read out, the value is “0.”
5
0
R W
6
0
R W
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