參數(shù)資料
型號： M37274EFSP
廠商： Mitsubishi Electric Corporation
英文描述： CONN HEADER 14POS SGL PCB 30GOLD
中文描述： 單芯片8位CMOS微機隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù)： 45/147頁
文件大小： 2042K
代理商： M37274EFSP
45
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37274EFSP
PRELIMINARY
Notice: This is not a final specification.
Some paramentic limits are subject to change.
MITSUBISHI MICROCOMPUTERS
4
set value of the start bit position
register
reference clock period
<
<
Time from the falling of the horizontal
synchronizing signal to the last rising
of the clock run-in
Fig. 40. Start Bit Position Register
Time from the faling of the horizontal
synchronous signal to occurrence of
the start bit
(7) Start Bit Detecting Circuit
This circuit detects a start bit at line decided in the data slice line
specification circuit. For start bit detection, it is possible to select one
of the following two types by using bit 1 of clock run-in register 2
(address 00E7
16
).
After the lapse of the time corresponding to the set value of the
start bit position register (address 00E1
16
), the first rising of the
composite video signal is detected as a start bit.
The time is set in bits 0 to 6 of the start bit position register (address
00E1
16
) (refer to Figure 40). Set a value fit for the following
conditions.
Figure 40 shows the structure of the start bit position register.
b7 b6 b5 b4 b3 b2 b1 b0
Start bit position register (SP) [Address 00E1
16
]
Start Bit Position Register
0
to
6
0
R W
0
R W
Start bit generating time
(SP0 to SP6)
7
DSC1 bit 7 control bit
(SP7)
B
After reset
Functions
Name
R W
0 : Generation of 16 pulses
1 : Generation of 16 pulses and
detection of clock run-in
pulse (4 to 6 pulses)
Time from a falling of the horizontal
synchronous signal to occurrence
of a start bit =
4
set value (“00
16
” to “7F
16
”)
reference clock period
1
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