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參數(shù)資料
| 型號： | M36L0R8060T0 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 256 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package |
| 中文描述： | 256兆位（多銀行，多層次，突發(fā)）64兆位閃存（突發(fā)）移動存儲芯片，1.8V電源，多芯片封裝 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大小： | 358K |
| 代理商： | M36L0R8060T0 |
1/18
PRELIMINARY DATA
December 2004
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
M36L0R8060T0
M36L0R8060B0
256 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory
64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
FEATURES SUMMARY
MULTI-CHIP PACKAGE
–
1 die of 256 Mbit (16Mb x16, Multiple
Bank, Multi-level, Burst) Flash Memory
–
1 die of 64 Mbit (4Mb x16) Pseudo SRAM
SUPPLY VOLTAGE
–
V
DDF
= V
CCP
= V
DDQ
= 1.7 to 1.95V
–
V
PP
= 9V for fast program
ELECTRONIC SIGNATURE
–
Manufacturer Code: 20h
–
Top Device Code
M36L0R8060T0: 880Dh
–
Bottom Device Code
M36L0R8060B0: 880Eh
PACKAGE
–
Compliant with Lead-Free Soldering
Processes
–
Lead-Free Versions
FLASH MEMORY
SYNCHRONOUS / ASYNCHRONOUS READ
–
Synchronous Burst Read mode: 54MHz
–
Asynchronous Page Read mode
–
Random Access: 85ns
SYNCHRONOUS BURST READ SUSPEND
PROGRAMMING TIME
–
10μs typical Word program time using
Buffer Enhanced Factory Program
command
MEMORY ORGANIZATION
–
Multiple Bank Memory Array: 16 Mbit
Banks
–
Parameter Blocks (Top or Bottom
location)
DUAL OPERATIONS
–
program/erase in one Bank while read in
others
–
No delay between read and write
operations
SECURITY
–
64 bit unique device number
–
2112 bit user programmable OTP Cells
■
■
■
■
■
■
■
■
■
■
Figure 1. Package
■
BLOCK LOCKING
–
All blocks locked at power-up
–
Any combination of blocks can be locked
with zero latency
–
WP
F
for Block Lock-Down
–
Absolute Write Protection with V
PPF
= V
SS
COMMON FLASH INTERFACE (CFI)
100,000 PROGRAM/ERASE CYCLES per
BLOCK
PSRAM
ACCESS TIME: 70ns
ASYNCHRONOUS PAGE READ
–
Page Size: 16 words
–
Subsequent read within page: 20ns
LOW POWER FEATURES
–
Temperature Compensated Refresh
(TCR)
–
Partial Array Refresh (PAR)
–
Deep Power-Down (DPD) Mode
SYNCHRONOUS BURST READ/WRITE
■
■
■
■
■
■
TFBGA88 (ZAQ)
8 x 10mm
FBGA
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M36L0R8060T1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R8060T1ZAQE | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R8060T1ZAQF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R8060T1ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R8060T9ZAQE | 制造商:Micron Technology Inc 功能描述:WIRELESS - Trays |
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