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參數(shù)資料
| 型號： | M36L0R7040B0ZAQF |
| 廠商： | 意法半導體 |
| 英文描述： | 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
| 中文描述： | 128兆位（多銀行，多層次，突發(fā)）閃存和16兆移動存儲芯片，1.8V電源，多芯片封裝 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大小： | 119K |
| 代理商： | M36L0R7040B0ZAQF |
1/18
December 2004
M36L0R7040T0
M36L0R7040B0
128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory
and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package
FEATURES SUMMARY
MULTI-CHIP PACKAGE
–
1 die of 128 Mbit (8Mb x16, Multiple Bank,
Multi-level, Burst) Flash Memory
–
1 die of 16 Mbit (1Mb x16) Pseudo SRAM
SUPPLY VOLTAGE
–
V
DDF
= V
DDP
DDQ
= 1.7 to 1.95V
–
V
PP
= 9V for fast program (12V tolerant)
ELECTRONIC SIGNATURE
–
Manufacturer Code: 20h
–
Device Code (Top Flash Configuration)
M36L0R7040T0: 88C4h
–
Device Code (Bottom Flash
Configuration) M36L0R7040B0: 88C5h
PACKAGE
–
Compliant with Lead-Free Soldering
Processes
–
Lead-Free Versions
FLASH MEMORY
SYNCHRONOUS / ASYNCHRONOUS READ
–
Synchronous Burst Read mode: 54MHz
–
Asynchronous Page Read mode
–
Random Access: 85ns
SYNCHRONOUS BURST READ SUSPEND
PROGRAMMING TIME
–
10μs typical Word program time using
Buffer Program
MEMORY ORGANIZATION
–
Multiple Bank Memory Array: 8 Mbit
Banks
–
Parameter Blocks (Top or Bottom
location)
DUAL OPERATIONS
–
program/erase in one Bank while read in
others
–
No delay between read and write
operations
SECURITY
–
64 bit unique device number
–
2112 bit user programmable OTP Cells
■
■
■
■
■
■
■
■
■
■
Figure 1. Package
■
BLOCK LOCKING
–
All blocks locked at power-up
–
Any combination of blocks can be locked
with zero latency
–
WP
F
for Block Lock-Down
–
Absolute Write Protection with V
PP
= V
SS
COMMON FLASH INTERFACE (CFI)
100,000 PROGRAM/ERASE CYCLES per
BLOCK
PSRAM
ACCESS TIME: 70ns
LOW STANDBY CURRENT: 110μA
DEEP POWER DOWN CURRENT: 10μA
■
■
■
■
■
TFBGA88 (ZAQ)
8 x 10mm
FBGA
相關PDF資料 |
PDF描述 |
|---|---|
| M36L0R7040B0ZAQT | 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R7040T0 | 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R7040T0ZAQE | 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R7040T0ZAQF | 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R7040T0ZAQT | 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M36L0R7040B0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R7040T0 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R7040T0ZAQE | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R7040T0ZAQF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
| M36L0R7040T0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package |
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