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參數(shù)資料
| 型號： | M35502AFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | FLD CONTROLLER |
| 中文描述： | 熒光檢測控制器 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 218K |
| 代理商： | M35502AFP |
M35502AFP
DESCRIPTION/FEATURES
High-breakdown-voltage output port ......................................... 25
Segment output............................................ 8 to 20
Digit output................................................... 5 to 16
(Ports P0 to P2 are also used as normal output ports)
Output breakdown..................................Vcc – 45 V
Output current ............... –18 mA (at DIG selecting),
–7 mA (at SEG selecting)
Pull-down resistor .........................................built-in
Dimmer switch ............................................ 4 levels
A-D converter ................................................... 8-bit
4 channels
Absolute accuracy....................................... ±3 LSB
PIN CONFIGURATION (TOP VIEW)
MITSUBISHI LINEAR IC’s
FLD CONTROLLER
Serial I/O ..................................... 3 (CS controller, external clock)
Noise filter .....................................................built-in
(in serial input pin and clock pin, 2 MHz sampling)
FLD display data ............................................. input
A-D conversion data ..................................... output
Command ....................................................... input
Package ......................................................................... 36P2R-G
Oscillation circuit ........... CR oscillation cirucit (external capacitor)
Oscillation frequency..................................... 2 MHz
Power source voltage..................................................4.0 to 5.5 V
Fig.1 Pin configuration of M35502AFP
Package type: 36P2R-G
F
0
F
1
F
2
F
3
F
4
F
5
F
6
F
7
F
8
F
9
F
1
F
1
F
1
F
1
F
1
F
1
F
1
V
E
S
D
S
C
C
A
3
A
2
A
1
A
0
V
S
O
V
C
F
2
/
F
2
/
F
2
/
F
2
F
2
F
1
F
1
F
1
1
2
3
4
5
6
7
8
9
1
1
1
1
1
1
1
1
1
3
3
3
3
3
3
3
2
2
2
2
2
2
2
2
2
2
1
M35502AFP
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