- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45028 > M35061-XXXSP 40 X 17 CHARACTERS CRT CHAR DSPL CTLR, PDIP32 PDF資料下載
參數(shù)資料
| 型號： | M35061-XXXSP |
| 元件分類： | 顯示控制器 |
| 英文描述： | 40 X 17 CHARACTERS CRT CHAR DSPL CTLR, PDIP32 |
| 封裝： | 0.400 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-32 |
| 文件頁數(shù)： | 6/39頁 |
| 文件大?。?/td> | 344K |
| 代理商： | M35061-XXXSP |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
14
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
M35061-XXXSP/FP
MITSUBISHI MICROCOMPUTERS
Interlace
Noninterlace
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
EX
SCOR
SELCOR
—
DSPON
DSPONV
—
BLK
SEPV0
SEPV1
TEST15
TEST16
PALH
MPAL
____
PAL/NTSC
___
INT/NON
(9) Address 2B016
Status
DA
Register
Contents
Function
Remarks
External synchronization
Internal synchronization
Superimpose black and white display
Superimpose coloring display
Normal
Mode of expansion
Must be cleared to 0.
Digital output display OFF
Digital output display ON
Composite video output display OFF
Composite video output display ON
Must be cleared to 0.
Matrix outline
Matrix outline + border (border color is black)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Test mode (Must be cleared to 0.)
Interlace/noninterlace normal mode
Interlace/noninterlace expansion mode
MPAL
0
1
0
1
Format
NTSC
M-PAL
PAL
Setting disabled
PAL/NTSC
0
1
Refer to Table 3, 4, 7 and 8.
Only at register “DSP1XX”
= 1 (XX = 00 to 16) is valid.
Method of sync separation from composite video.
Valid at only PAL and MPAL
mode.
SEPV1
0
1
SEPV0
0
1
0
1
Composite Sync Spearation Function
Separation is performed during 1 in vertical blanking period
Separation is performed during 2 in vertical blanking period
Separation is performed during 3 in vertical blanking period
Setting disabled
Case 1 condition: vertical sync must repeat 2X
within 2 or 3; indicates this area.
2
3
1
(Note 1)
Valid at only register “EX”=0 (at exter-
nal synchronous) (Note 2, 3 and 4)
Notes 1: For internal synchronization, shut out (mute) the external video signal input, outside the IC. This avoids external video signal leaks
inside the IC.
2: For superimposed color displays, input an fsc signal which is synchronized with the color burst of the composite video signal (input to
the CVIN pin) to the OSCIN pin.
3: When EX (address 2B016) = “1” (internal synchronization), set the SCOR register to “0”.
4: When using a crystal oscillator (for the fsc input) between the OSCIN and OSCOUT pin, set the SCOR register to “0”.
相關PDF資料 |
PDF描述 |
|---|---|
| M35061-XXXFP | 40 X 17 CHARACTERS CRT CHAR DSPL CTLR, PDSO32 |
| M35070-002FP | 24 X 12 CHARACTERS CRT CHAR DSPL CTLR, PDSO20 |
| M35070-XXXSP | 24 X 12 CHARACTERS CRT CHAR DSPL CTLR, PDIP20 |
| M35070-002SP | 24 X 12 CHARACTERS CRT CHAR DSPL CTLR, PDIP20 |
| M35070-XXXFP | 24 X 12 CHARACTERS CRT CHAR DSPL CTLR, PDSO20 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M35062 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS |
| M35062-001SP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS |
| M35062-XXXSP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS |
| M3506-KIT-380-3 | 制造商:Bonitron 功能描述:REGULATOR FOR VFDS |
| M3506-KIT-380-3-80 | 制造商:Bonitron 功能描述:REGULATOR FOR VFDS |
發(fā)布緊急采購，3分鐘左右您將得到回復。