參數(shù)資料
型號(hào)： M35060-090SP
廠商： Mitsubishi Electric Corporation
英文描述： SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
中文描述： 電影中的角色和模式顯示控制器
文件頁數(shù)： 2/42頁
文件大?。?/td> 260K
代理商： M35060-090SP
2
MITSUBISHI MICROCOMPUTERS
M35060-XXXSP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
PIN DESCRIPTION
These input pins determine address and data of the Display RAM, Control RAM, and
Overlay RAM (SYRAM) by 8-bit parallel. Hysteresis input is required.
When this input pin transitions from “H” to “L”, the device is reset. Built-in a pull-up
resistor. Hysteresis input is required.
Digital power supply pin. This pin must be connected to + 5V.
Ground pin. This pin must be connected to 0V.
This pin outputs the composite video signal. The output signal is 2Vp-p. In superim-
pose mode, this pin’s signal consists of the OSD signal combined with the input
composite signal CVIN.
This input pin is used for controlling the “white” character color level of the OSD signal.
This input pin is used for controlling the “black” character color level of the OSD signal.
This input pin is used for the superimpose mode. An external composite signal may be
input through this pin and mixed with the internally generated OSD signal.
This input pin is used to input the same signal as CVIN. The horizontal and vertical
sync signals are then extracted internally within the device.
This input pin is used to determine the slice voltage for extracting the sync signals from
the video composite signal.
This is filter output pin 1.
Analog power supply pin. This pin must be connected to +5V.
This is filter output pin 2.
These are the pins for attaching an external oscillator circuit for generating the
synchronization signal:
NTSC (3.580MHz), PAL (4.434MHz), M-PAL (3.576MHz).
Factory test pin. The pin must be connected to GND.
This output pin can be configured to port P0 or YM output.
This output pin can be configured to port P1 or BLNK output.
This output pin can be configured to port P2 or B output.
This output pin can be configured to port P3 or G output.
This output pin can be configured to port P4 or R output.
This output pin can be configured to port P5 or CSYN output.
Factory test pin. The pin must be connected to GND.
This pin is enabled when the CS pin is “L”. Data input to pins AD0 to AD7 is latched at
the rising edge of this signal. This pin is hysteresis input.
This is chip selection input pin. When this pin is “L”, transmission is enabled. This pin is
hysteresis input.
Function
Symbol
AD0~AD7
AC
V
DD1
V
SS
CVIDEO
LECHA
LEBK
CVIN
HOR
VREF
LP1
V
DD2
LP2
OSCOUT
OSCIN
TESTB
P0
P1
P2
P3
P4
P5
TESTA
SCK
CS
Parallel data input
Auto-clear input
Power pin
Earthing pin
Composite video
signal output
Character level input
Black level input
Composite video
signal input
Synchronous signal
input
Slice level input
Filter output 1
Power pin
Filter output 2
The pins for attaching an exter-
nal oscillator circuit for genera-
ting the synchronization signal.
Test input
Port output
Port output
Port output
Port output
Port output
Port output
Test input
Clock input for data
input
Chip select input
Pin name
Input/Output
Input
Input
—
—
Output
Input
Input
Input
Input
Input
Output
—
Output
Output
Input
Input
Output
Output
Output
Output
Output
Output
Input
Input
Input
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