
4
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
M35060-XXXSP
MITSUBISHI MICROCOMPUTERS
MEMORY CONSTRUCTION
Address 00016 to 2A716 are assigned to the display RAM, 2A816 to
2B016 are assigned to the display control registers and 30016 to
6EC16 are assigned to SYRAM.
The internal circuit is reset and all display control registers (address
2A816 to 2B016) are set to “0”. The memory constitution of display
RAM and register is shown in Figure 1 and the memory constitution
of SYRAM is shown in Figure 2.
: Name or value changes by definite ratio.
: The same name or value continues.
add-
ress
00016
2A716
2A816
2A916
2AA16
2AB16
2AC16
2AD16
2AE16
2AF16
2B016
DA17
SB
–
PC7
–
DA16
SG
TEST
3
–
TEST
23
–
PC6
TEST
19
DA15
SR
TEST
2
–
TEST
26
–
TEST
22
–
PC5
TEST
18
DA14
SYC5
TEST
1
BLINK
3
TEST
12
TEST
25
TEST
21
SERS
3
–
PC4
TEST
17
DA13
SYC4
TEST
0
BLINK
2
EQP
PHASE
2
LINE
B
SERS
2
–
PC3
TEST
24
DA12
SYC3
TEST
11
BLINK
1
TEST
20
PHASE
1
LINE
G
SERS
1
SEND
4
PC2
LEVEL
2
DA10
SYC1
HP8
HSZ
16
VSZ
16
DSP0
16
DSP1
16
ERS
16
SEND
2
PC0
LEVEL
0
DAF
SYC0
HP7
HSZ
15
VSZ
15
DSP0
15
DSP1
15
ERS
15
SEND
1
ALL24
INT
NON
DAE
BB
HP6
HSZ
14
VSZ
14
DSP0
14
DSP1
14
ERS
14
SEND
0
SRAND
2
PAL
NTSC
DAD
BG
HP5
HSZ
13
VSZ
13
DSP0
13
DSP1
13
ERS
13
SST
4
SRAND
1
MPAL
DAC
BR
HP4
HSZ
12
VSZ
12
DSP0
12
DSP1
12
ERS
12
SST
3
SRAND
0
PALH
DAB
BLINK
HP3
HSZ
11
VSZ
11
DSP0
11
DSP1
11
ERS
11
SST
2
PTD
5
TEST
16
DAA
CB
HP2
HSZ
10
VSZ
10
DSP0
10
DSP1
10
ERS
10
SST
1
PTD
4
TEST
15
DA9
CG
HP1
HSZ
9
VSZ
9
DSP0
09
DSP1
09
ERS
9
SST
0
PTD
3
SEPV1
DA8
CR
HP0
HSZ
8
VSZ
8
DSP0
08
DSP1
08
ERS
8
SLIN
4
PTD
2
SEPV0
DA7
C7
VP7
HSZ
7
VSZ
7
DSP0
07
DSP1
07
ERS
7
SLIN
3
PTD
1
BLK
DA6
C6
VP6
HSZ
6
VSZ
6
DSP0
06
DSP1
06
ERS
6
SLIN
2
PTD
0
–
DA5
C5
VP5
HSZ
5
VSZ
5
DSP0
05
DSP1
05
ERS
5
SLIN
1
PTC
5
DSP
ONV
DA4
C4
VP4
HSZ
4
VSZ
4
DSP0
04
DSP1
04
ERS
4
SLIN
0
PTC
4
DSP
ON
DA3
C3
VP3
HSZ
3
VSZ
3
DSP0
03
DSP1
03
ERS
3
SBIT
3
PTC
3
–
DA2
C2
VP2
HSZ
2
VSZ
2
DSP0
02
DSP1
02
ERS
2
SBIT
2
PTC
2
SEL
COR
DA1
C1
VP1
HSZ
1
VSZ
1
DSP0
01
DSP1
01
ERS
1
SBIT
1
PTC
1
–
DA0
C0
VP0
HSZ
0
VSZ
0
DSP0
00
DSP1
00
ERS
0
SBIT
0
PTC
0
EX
SY color setting
SYRAM setting
DA11
SYC2
TEST
10
BLINK
0
HIDE
PHASE
0
LINE
R
SERS
0
SEND
3
PC1
LEVEL
1
Raster color setting
Character color setting
Character setting
~
Table 1 The memory constitution of display RAM and register
Table 2 The memory constitution of SYRAM
add-
ress
30016
30C16
31016
31C16
6D016
6DC16
6E016
6EC16
0
DA17 ~ DAD
0
DAC
SYEX
DAB
S00B
S01B
S3DB
S3EB
DAA
S00A
S01A
S3DA
S3EA
DA9
S009
S019
S3D9
S3E9
DA8
S008
S018
S3D8
S3E8
DA7
S007
S017
S3D7
S3E7
DA6
S006
S016
S3D6
S3E6
DA5
S005
S015
S3D5
S3E5
DA4
S004
S014
S3D4
S3E4
DA3
S003
S013
S3D3
S3E3
DA2
S002
S012
S3D2
S3E2
DA1
S001
S011
S3D1
S3E1
DA0
S000
S010
S3D0
S3E0
SYRAM code
0016
0116
3D16
3E16
…
……
…
……
…
……
…
……
…
……
…
……
…
……
…
……
…
……
…
……
…
……
…
……
…
……
…
……
…
~
~~
~
TESTn (n = number) is MITSUBISHI test memory. Set 0 to all bits.
~
…