參數(shù)資料
型號(hào)： M34570MD-XXXFP
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO36
封裝： 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-36
文件頁(yè)數(shù)： 47/69頁(yè)
文件大?。?/td> 780K
代理商： M34570MD-XXXFP
58
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
CONTROL REGISTERS
V13
V12
V11
V10
Timer 2 interrupt enable bit
Timer 1 interrupt enable bit
Not used
External 0 interrupt enable bit
0
1
0
1
0
1
0
1
Interrupt disabled (SNZT2 instruction is valid)
Interrupt enabled (SNZT2 instruction is invalid)
Interrupt disabled (SNZT1 instruction is valid)
Interrupt enabled (SNZT1 instruction is invalid)
This bit has no function, but read/write is enabled.
Interrupt disabled (SNZ0 instruction is valid)
Interrupt enabled (SNZ0 instruction is invalid)
Interrupt control register V1
at reset : 00002
RAM back-up : 00002
R/W
V23
V22
V21
V20
Not used
Timer 3 interrupt enable bit
0
1
0
1
0
1
0
1
This bit has no function, but read/write is enabled.
Interrupt disabled (SNZT3 instruction is valid)
Interrupt enabled (SNZT3 instruction is invalid)
Interrupt control register V2
at reset : 00002
at RAM back-up : 00002
R/W
This bit has no function, but read/write is enabled.
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: Depending on the input state of P21/INT pin, the external interrupt request flag EXF0 may be set to “1” when the contents
of I12 is changed. Accordingly, set a value to bit 2 of register I1 and execute the SNZ0 instruction to clear the EXF0 flag after
executing at least one instruction.
I13
I12
I11
I10
Not used
Interrupt valid waveform for INT pin /return
level selection bit (Note 2)
Not used
0
1
0
1
0
1
0
1
This bit has no function, but read/write is enabled.
Falling waveform (“L” level of INT pin is recognized with the SNZI0
instruction)/“L” level
Rising waveform (“H” level of INT pin is recognized with the SNZI0
instruction)/“H” level
This bit has no function, but read/write is enabled.
Interrupt control register I1
R/W
at reset : 00002
at RAM back-up : state retained
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