- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄45027 > M34554MC-XXXFP 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64 PDF資料下載
參數(shù)資料
| 型號(hào)： | M34554MC-XXXFP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 |
| 文件頁(yè)數(shù)： | 72/138頁(yè) |
| 文件大?。?/td> | 1082K |
| 代理商： | M34554MC-XXXFP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)當(dāng)前第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)
Rev.3.00
Aug 06, 2004
page 39 of 136
REJ03B0043-0300Z
4554 Group
(7) Timer 5 (interrupt function)
Timer 5 is a 16-bit binary down counter.
Timer 5 starts counting after the following process;
set count value by bits 0 and 1 of register W5, and
set the bit 2 of register W5 to “1.”
Count source for timer 5 is the sub-clock input (XCIN).
Once count is started, when timer 5 underflows (the set count
value is counted), the timer 5 interrupt request flag (T5F) is set to
“1,” and count continues.
Bit 4 of timer 5 can be used as the timer LC count source for the
LCD clock generating.
When bit 2 of register W5 is cleared to “0”, timer 5 is initialized to
“FFFF16” and count is stopped.
Timer 5 can be used as the counter for clock because it can be op-
erated at clock operating mode (POF instruction execution). When
timer 5 underflow occurs at clock operating mode, system returns
from the power down state.
(8) Timer LC
Timer LC is a 4-bit binary down counter with the timer LC reload
register (RLC). Data can be set simultaneously in timer LC and the
reload register (RLC) with the TLCA instruction. Data cannot be
read from timer LC. Stop counting and then execute the TLCA in-
struction to set timer LC data.
Timer LC starts counting after the following process;
set data in timer LC,
select the count source with the bit 2 of register W6, and
set the bit 3 of register W6 to “1.”
When a value set in reload register RLC is n, timer LC divides the
count source signal by n + 1 (n = 0 to 15).
Once count is started, when timer LC underflows (the next count
pulse is input after the contents of timer LC becomes “0”), new data
is loaded from reload register RLC, and count continues (auto-re-
load function).
Timer LC underflow signal divided by 2 can be used for the LCD
clock.
(9) Timer input/output pin
(D7/CNTR0 pin, C/CNTR1 pin)
CNTR0 pin is used to input the timer 1 count source and output the
timer 1 and timer 2 underflow signal divided by 2.
CNTR1 pin is used to input the timer 3 count source and output the
PWM signal generated by timer 4. When the PWM signal is output
from C/CNTR1 pin, set “0” to the output latch of port C.
The D7/CNTR0 pin function can be selected by bit 0 of register W6.
The selection of CNTR1 output signal can be controlled by bit 3 of
register W4.
When the CNTR0 input is selected for timer 1 count source, timer
1 counts the rising waveform of CNTR0 input.
When the CNTR1 input is selected for timer 3 count source, timer
3 counts the rising waveform of CNTR1 input. Also, when the
CNTR1 input is selected, the output of port C is invalid (high-im-
pedance state).
(10) Timer interrupt request flags
(T1F, T2F, T3F, T4F, T5F)
Each timer interrupt request flag is set to “1” when each timer
underflows. The state of these flags can be examined with the skip
instructions (SNZT1, SNZT2, SNZT3, SNZT4, SNZT5).
Use the interrupt control register V1, V2 to select an interrupt or a
skip instruction.
An interrupt request flag is cleared to “0” when an interrupt occurs
or when the next instruction is skipped with a skip instruction.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M34554EDFP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP64 |
| M3455AG8-XXXFP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP52 |
| M3455AGCFP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP52 |
| M3455AGC-XXXFP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP52 |
| M3455AG8FP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP52 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34556G8FP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34556G8HFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34556M4H-XXXFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34556M4-XXXFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34556M8H-XXXFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。