參數(shù)資料
型號: M34553M4-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 101/147頁
文件大小: 1098K
代理商: M34553M4-XXXFP
Rev.3.02
Dec 22, 2006
page 55 of 142
REJ03B0024-0302
4553 Group
Table 17 Key-on wakeup control register, pull-up control register and interrupt control register
K03
K02
K01
K00
Key-on wakeup control register K0
Key-on wakeup not used
Key-on wakeup used
Key-on wakeup not used
Key-on wakeup used
Key-on wakeup not used
Key-on wakeup used
Key-on wakeup not used
Key-on wakeup used
Port P12, P13 key-on wakeup
control bit (Note 3)
Port P10, P11 key-on wakeup
control bit (Note 2)
Port P02, P03 key-on wakeup
control bit
Port P00, P01 key-on wakeup
control bit
at reset : 00002
at power down : state retained
0
1
0
1
0
1
0
1
R/W
TAK0/
TK0A
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: To be invalid (K02 = “0”) key-on wakeup of ports P10 and P11, set the registers K10 and K11 to “0”.
3: To be invalid (K03 = “0”) key-on wakeup of ports P12 and P13, set the registers K12 and K13 to “0”.
K13
K12
K11
K10
Key-on wakeup control register K1
Returned by edge
Returned by level
Falling waveform/“L” level
Rising waveform/“H” level
Returned by edge
Returned by level
Falling waveform/“L” level
Rising waveform/“H” level
Ports P12, P13 return condition selection bit
(Note 3)
Ports P12, P13 valid waveform/level
selection bit (Note 3)
Ports P10, P11 return condition selection bit
(Note 2)
Ports P10, P11 valid waveform/level
selection bit (Note 2)
at reset : 00002
at power down : state retained
0
1
0
1
0
1
0
1
K23
K22
K21
K20
Key-on wakeup control register K2
This bit has no function, but read/write is enabled.
Returned by level
Returned by edge
Key-on wakeup invalid
Key-on wakeup valid
Not used
INT pin return condition selection bit
INT pin key-on wakeup control bit
at reset : 00002
at power down : state retained
0
1
0
1
0
1
0
1
R/W
TAK1/
TK1A
R/W
TAK2/
TK2A
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