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| 型號(hào)： | M34524MC-XXXFP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 |
| 文件頁(yè)數(shù)： | 118/161頁(yè) |
| 文件大小： | 1199K |
| 代理商： | M34524MC-XXXFP |
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Rev.2.00
Jul 27, 2004
page 6 of 159
REJ03B0091-0200Z
4524 Group
DEFINITION OF CLOCK AND CYCLE
q Operation source clock
The operation source clock is the source clock to operate this
product. In this product, the following clocks are used.
Clock (f(XIN)) by the external ceramic resonator
Clock (f(XIN)) by the external RC oscillation
Clock (f(XIN)) by the external input
Clock (f(RING)) of the on-chip oscillator which is the internal
oscillator
Clock (f(XCIN)) by the external quartz-crystal oscillation
Register MR
System clock
f(STCK) = f(XIN) or f(RING)
f(STCK) = f(XCIN)
f(STCK) = f(XIN)/2 or f(RING)/2
f(STCK) = f(XCIN)/2
f(STCK) = f(XIN)/4 or f(RING)/4
f(STCK) = f(XCIN)/4
f(STCK) = f(XIN)/8 or f(RING)/8
f(STCK) = f(XCIN)/8
Table Selection of system clock
: 0 or 1
Note: The f(RING)/8 is selected after system is released from reset.
MR2
0
1
0
1
MR3
0
1
Operation mode
High-speed through mode
Low-speed through mode
High-speed frequency divided by 2 mode
Low-speed frequency divided by 2 mode
High-speed frequency divided by 4 mode
Low-speed frequency divided by 4 mode
High-speed frequency divided by 8 mode
Low-speed frequency divided by 8 mode
q System clock (STCK)
The system clock is the basic clock for controlling this product.
The system clock is selected by the clock control register MR
shown as the table below.
q Instruction clock (INSTCK)
The instruction clock is the basic clock for controlling CPU. The
instruction clock (INSTCK) is a signal derived by dividing the
system clock (STCK) by 3. The one instruction clock cycle gen-
erates the one machine cycle.
q Machine cycle
The machine cycle is the standard cycle required to execute the
instruction.
MR0
0
1
0
1
0
1
0
1
MR1
0
0
0
0
Notes 1: Pins except above have just single function.
2: The output of D8 and D9 can be used even when INT0 and INT1 are selected.
3: The input of ports D4–D6 can be used even when SIN, SOUT and SCK are selected.
4: The input/output of D7 can be used even when CNTR0 (input) is selected.
5: The input of D7 can be used even when CNTR0 (output) is selected.
6: The port C “H” output function can be used even when CNTR1 (output) is selected.
Pin
D4
D5
D6
D7
D8
D9
VLC3
VLC2
VLC1
Multifunction
SIN
SOUT
SCK
CNTR0
INT0
INT1
SEG0
SEG1
SEG2
MULTIFUNCTION
Pin
SIN
SOUT
SCK
CNTR0
INT0
INT1
SEG0
SEG1
SEG2
Multifunction
D4
D5
D6
D7
D8
D9
VLC3
VLC2
VLC1
Pin
C
P20
P21
P22
P23
P30
P31
P32
P33
Multifunction
CNTR1
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
Pin
CNTR1
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
Multifunction
C
P20
P21
P22
P23
P30
P31
P32
P33
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