
29
4501 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
WATCHDOG TIMER
Watchdog timer provides a method to reset the system when a pro-
gram run-away occurs. Watchdog timer consists of timer
WDT(16-bit binary counter), watchdog timer enable flag (WEF),
and watchdog timer flags (WDF1, WDF2).
The timer WDT downcounts the instruction clocks as the count
source from
“
FFFF
16
”
after system is released from reset.
After the count is started, when the timer WDT underflow occurs
(after the count value of timer WDT reaches
“
FFFF
16
,
”
the next
count pulse is input), the WDF1 flag is set to
“
1.
”
If the WRST instruction is never executed until the timer WDT un-
derflow occurs (until timer WDT counts 65534), WDF2 flag is set to
“
1,
”
and the RESET pin outputs
“
L
”
level to reset the microcom-
puter.
Execute the WRST instruction at each period of 65534 machine
cycle or less by software when using watchdog timer to keep the
microcomputer operating normally.
When the WEF flag is set to
“
1
”
after system is released from reset,
the watchdog timer function is valid.
When the DWDT instruction and the WRST instruction are ex-
ecuted continuously, the WEF flag is cleared to
“
0
”
and the
watchdog timer function is invalid.
However, in order to set the WEF flag to
“
1
”
again once it has
cleared to
“
0
”
, execute system reset.
The WRST instruction has the skip function. When the WRST in-
struction is executed while the WDF1 flag is
“
1
”
, the WDF1 flag is
cleared to
“
0
”
and the next instruction is skipped.
When the WRST instruction is executed while the WDF1 flag is
“
0
”
,
the next instruction is not skipped.
The skip function of the WRST instruction can be used even when
the watchdog timer function is invalid.
Fig. 24 Watchdog timer function
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16