參數(shù)資料
型號(hào)： M30882FWUGP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù)： 28/60頁
文件大?。?/td> 458K
代理商： M30882FWUGP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3826 Group
35
PULSE WIDTH MODULATION (PWM)
The 3826 group has a PWM function with an 8-bit resolution,
based on a signal that is the clock input XIN or that clock input di-
vided by 2.
Data Setting
The PWM output pin also functions as ports P50 and P51. Set the
PWM period by the PWM prescaler, and set the period during
which the output pulse is an “H” by the PWM register.
If PWM count source is f(XIN) and the value in the PWM prescaler
is n and the value in the PWM register is m (where n = 0 to 255
and m = 0 to 255) :
PWM period = 255 (n+1)/f(XIN)
= 31.875 (n+1)
s (when f(XIN) = 8 MHz)
Output pulse “H” period = PWM period m/255
= 0.125 (n+1) m
s
(when f(XIN) = 8 MHz)
PWM Operation
When at least either bit 1 (PWM0 function enable bit) or bit 2
(PWM1 function enable bit) of the PWM control register is set to
“1”, operation starts by initializing the PWM output circuit, and
pulses are output starting at an “H”. When one PWM output is en-
abled and that the other PWM output is enabled, PWM output
which is enabled to output later starts pulse output from halfway.
When the PWM register or PWM prescaler is updated during
PWM output, the pulses will change in the cycle after the one in
which the change was made.
Fig. 32 Timing of PWM cycle
Fig. 33 Block diagram of PWM function
Data bus
Count source
selection bit
“0”
“1”
PWM
prescaler pre-latch
PWM
register pre-latch
PWM
prescaler latch
PWM
register latch
Transfer control circuit
PWM circuit
1/2
XIN
PWM0 function
enable bit
Port P51
PWM prescaler
PWM1 function
enable bit
Port P50
Port P51
lacth
Port P50
lacth
31.875 m (n+1)
255
s
T = [31.875 (n+1)]
s
PWM output
m: Contents of PWM register
n : Contents of PWM prescaler
T : PWM cycle (when f(XIN) = 8 MHz)
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