參數(shù)資料
型號: M30843FJTGP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 77/91頁
文件大小: 903K
代理商: M30843FJTGP
78
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Som
e parametric
limits
are
subject
to
change.
qStatus Register (SRD)
The status register indicates operating status of the flash memory
and status such as whether an erase operation or a program
ended successfully or in error. It can be read by writing the read
status register command (7016). Also, the status register is
cleared by writing the clear status register command (5016).
Table 16 lists the definition of each status register bit. After releas-
ing the reset, the status register becomes “8016”.
Sequencer status (SR7)
The sequencer status indicates the operating status of the the
flash memory.
After power-on and recover from deep power down mode, the se-
quencer status is set to “1” (ready).
This status bit is set to “0” (busy) during write or erase operation
and is set to “1” upon completion of these operations.
Erase status (SR5)
The erase status indicates the operating status of erase operation.
If an erase error occurs, it is set to “1”. When the erase status is
cleared, it is set to “0”.
Program status (SR4)
The program status indicates the operating status of write opera-
tion. If a write error occurs, it is set to “1”. When the program
status is cleared, it is set to “0”.
SRD bits
SR7 (bit7)
SR6 (bit6)
SR5 (bit5)
SR4 (bit4)
SR3 (bit3)
SR2 (bit2)
SR1 (bit1)
SR0 (bit0)
Definition
“1”“0”
Table 16 Status register (SRD)
Status name
Sequencer status
Reserved
Erase status
Program status
Reserved
Ready
-
Terminated in error
-
Busy
-
Terminated normally
-
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參數(shù)描述
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