
Under
development
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M16C/80 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
DMAC
85
Figure 1.11.5. DMAC register (4)
b23
b0
Function
RW
Memory address (Note 2)
Set source or destination memory address
Symbol
When reset
DMA0
XXXXXX16
DMA1
XXXXXX16
DMA2 (bank 1;A0) (Note 1)
00000016
DMA3 (bank 1;A1) (Note 1)
00000016
DMAi memory address register (i = 0 to 3)
(CPU internal register)
Transfer address
specification area
00000016 to FFFFFF16
(16 Mbytes area)
Note 1: When setting DMA2 and DMA3, set "1" to the register bank select flag (B flag) of
flag register (FLG), and set desired value to A0 and A1 of register bank 1.
Note 2: When the transfer direction select bit is "0" (fixed address to memory), this register
is destination memory address.
When the transfer direction select bit is "1" (memory to fixed address), this register
is source memory address.
b0
Function
RW
SFR address (Note 2)
Set source or destination fixed address
Symbol
When reset
DSA0
XXXXXX16
DSA1
XXXXXX16
DSA2 (bank 1;SB) (Note 1)
00000016
DSA3 (bank 1;FB) (Note 1)
00000016
DMAi SFR address register (i = 0 to 3)
(CPU internal register)
Transfer address
specification area
00000016 to FFFFFF16
(16 Mbytes area)
Note 1: When setting DSA2, set "1" to the register bank select flag (B flag) of flag register
(FLG), and set desired value to SB of register bank 1.
When setting DSA3, set "1" to the register bank select flag (B flag) of flag register
(FLG), and set desired value to FB of register bank 1.
Note 2: When the transfer direction select bit is "0" (fixed address to memory), this register
is source fixed address.
When the transfer direction select bit is "1" (memory to fixed address), this register
is destination fixed address.
b0
Function
RW
Memory address register reload value
Set source or destination memory address
Symbol
When reset
DRA0
XXXXXX16
DRA1
XXXXXX16
DRA2 (SVP) (Note)
XXXXXX16
DRA3 (VCT) (Note)
XXXXXX16
DMAi memory address reload register (i = 0 to 3)
(CPU internal register)
Transfer address
specification area
00000016 to FFFFFF16
(16 Mbytes area)
Note: When setting DRA2, set desired value to save PC register (SVP).
When setting DRA3, set desired value to vector register (VCT).
b23