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參數(shù)資料
| 型號(hào)： | M306V7MG-XXXFP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16.1 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁(yè)數(shù)： | 77/300頁(yè) |
| 文件大?。?/td> | 2323K |
| 代理商： | M306V7MG-XXXFP |
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Rev.1.00
May 18, 2004
page 166 of 296
M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP
2.14.2 Clamping Circuit and Low-pass Filter
The clamp circuit clamps the sync. tip part of the composite video signal input from the CVIN pin. The low-
pass filter attenuates the noise of clamped composite video signal. The CVIN pin to which composite video
signal is input requires a capacitor (0.1
F) coupling outside. Pull down the CVIN pin with a resistor of
hundreds of kiloohms to 1 M
. In addition, we recommend to install externally a simple low-pass filter
using a resistor and a capacitor at the CVIN pin (refer to Figure 2.14.1 and notes).
2.14.3 Sync Slice Circuit
This circuit takes out a composite sync signal from the output signal of the low-pass filter.
Set bit 6 and 7 to 11b of ID1 reserved register (addresses 037C16 and 031D16) show in Fig 2.14.21.
2.14.4 Synchronous Signal Separation Circuit
This circuit separates a horizontal synchronous signal and a vertical synchronous signal from the compos-
ite sync signal taken out in the sync slice circuit.
(1) Horizontal synchronous signal (Hsep)
A one-shot horizontal synchronizing signal Hsep is generated at the falling edge of the composite sync
signal.
(2) Vertical synchronous signal (Vsep)
As a Vsep signal generating method, it is possible to select one of the following 2 methods by using bit
4 of the data slicer control register 2 (address 026116/030116).
Method 1 The “L” level width of the composite sync signal is measured. If this width exceeds a
certain time, a Vsep signal is generated in synchronization with the rising of the timing
signal immediately after this “L” level.
Method 2 The “L” level width of the composite sync signal is measured. If this width exceeds a
certain time, it is detected whether a falling of the composite sync signal exits or not in the
“L” level period of the timing signal immediately after this “L” level. If a falling exists, a Vsep
signal is generated in synchronization with the rising of the timing signal (refer to Figure
2.14.6).
Figure 2.14.6 shows a Vsep generating timing. The timing signal shown in the figure is generated from the
reference clock which the timing generating circuit outputs.
Reading bit 5 of data slicer control register 2 permits determinating the shape of the V-pulse portion of the
composite sync signal. As shown in Figure 2.14.7, when the A level matches the B level, this bit is “0.” In
the case of a mismatch, the bit is “1.”
Figure 2.14.6 Vsep generating timing (method 2)
Composite sync
“L” level width is measured
“L” level period of a timing signal
Timing
signal
A Vsep signal is generated at a rising of the timing signal
immediately after the “L” level width of the composite
sync signal exceeds a certain time.
Vsep signal
Figure 2.14.7 Determination of v-pulse waveform
Composite
sync signal
A
B
0
1
Bit 5 of
DSC02/DSC12
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M306V7FJFP | 16-BIT, FLASH, 16.1 MHz, MICROCONTROLLER, PQFP100 |
| M306V7FGFP | 16-BIT, FLASH, 16.1 MHz, MICROCONTROLLER, PQFP100 |
| M306V7FHFP | 16-BIT, FLASH, 16.1 MHz, MICROCONTROLLER, PQFP100 |
| M30800MC-XXXFP | 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP100 |
| M30800MC-XXXGP | 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M306V7MH-XXXFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M306V7MJA-XXXFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M306V7MJ-XXXFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M306V7T-RPD-E | 功能描述:DEV EMULATION POD FOR M16C/6V (M RoHS:否 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 配件 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 標(biāo)準(zhǔn)包裝:1 系列:- 附件類(lèi)型:USB 至 1-Wire? RJ11 適配器 適用于相關(guān)產(chǎn)品:1-Wire? 設(shè)備 產(chǎn)品目錄頁(yè)面:1429 (CN2011-ZH PDF) |
| M306V8FJFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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