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  • 參數(shù)資料
    型號: M306N4FGTFP-U0
    元件分類: 微控制器/微處理器
    英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
    封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
    文件頁數(shù): 72/92頁
    文件大小: 694K
    代理商: M306N4FGTFP-U0
    Rev.2.40
    Aug 25, 2006
    page 74 of 88
    REJ03B0003-0240
    M16C/6N Group (M16C/6N4)
    5. Electric Characteristics (Normal-ver.)
    Under development
    This document is under development and its contents are subject to change.
    15
    ns
    External clock input cycle time
    External clock input HIGH pulse width
    External clock input LOW pulse width
    External clock rise time
    External clock fall time
    Symbol
    Parameter
    Min.
    Standard
    Unit
    Max.
    62.5
    25
    tC
    tw(H)
    tw(L)
    tr
    tf
    Timing Requirements
    (Referenced to VCC = 3.3 V, VSS = 0 V, at Topr = –40 to 85°C unless otherwise specified)
    Table 5.52 External Clock Input (XIN Input)
    Table 5.53 Memory Expansion Mode and Microprocessor Mode
    (NOTE 1)
    (NOTE 2)
    (NOTE 3)
    ns
    Data input access time (for setting with no wait)
    Data input access time (for setting with wait)
    Data input access time (when accessing multiplexed bus area)
    Data input setup time
    ________
    RDY input setup time
    __________
    HOLD input setup time
    Data input hold time
    ________
    RDY input hold time
    __________
    HOLD input hold time
    Symbol
    Parameter
    Min.
    Standard
    Unit
    Max.
    50
    40
    50
    0
    tac1(RD-DB)
    tac2(RD-DB)
    tac3(RD-DB)
    tsu(DB-RD)
    tsu(RDY-BCLK)
    tsu(HOLD-BCLK)
    th(RD-DB)
    th(BCLK-RDY)
    th(BCLK-HOLD)
    NOTES:
    1. Calculated according to the BCLK frequency as follows:
    0.5
    109
    f(BCLK)
    – 60 [ns]
    2. Calculated according to the BCLK frequency as follows:
    (n –0.5)
    109
    f(BCLK)
    – 60 [ns]
    n is “2” for 1-wait setting, “3” for 2-wait setting and “4” for 3-wait setting.
    3. Calculated according to the BCLK frequency as follows:
    (n –0.5)
    109
    f(BCLK)
    – 60 [ns]
    n is “2” for 2-wait setting, “3” for 3-wait setting.
    VCC = 3.3 V
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