
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA SLICER and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
9
Rev. 1.0
M306H1SFP
2. Operation of Functional Blocks
The M306H0SFP accommodates certain units in a single chip. These units include RAM to store instruc-
tions and data and the central processing unit (CPU) to execute arithmetic/logic operations. Also included
are peripheral units such as timers, serial I/O, D-A converter, DMAC, CRC calculation circuit, A-D con-
verter, OSD circuit, Data slicer circuit, Data encode circuit and I/O ports.
The following explains each unit.
2.1 Memory
Figure 2.1.1 is a memory map of the M306H0SFP. The address space extends the 1M bytes from ad-
dress 0000016 to FFFFF16. From address FFFFF16 down is ROM. In the M306H0SFP, can use from
address from 0400016 to FFFFF16 as external ROM area. The vector table for fixed interrupts such as the
_______
reset and NMI are mapped to from address FFFDC16 to FFFFF16. The starting address of the interrupt
routine is stored here. The address of the vector table for timer interrupts, etc., can be set as desired
using the internal register (INTB). See the section on interrupts for details.
5K bytes of internal RAM is mapped to from address 0040016 to 017FF16. In addition to storing data, the
RAM also stores the stack used when calling subroutines and when interrupts are generated.
The SFR area is mapped to from address 0000016 to 003FF16. This area accommodates the control
registers for peripheral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Figures 2.1.2
to 2.1.4 are location of peripheral unit control registers. Any part of the SFR area that is not occupied is
reserved and cannot be used for other purposes.
The special page vector table is mapped to from address FFE0016 to FFFDB16. If the starting addresses
of subroutines or the destination addresses of jumps are stored here, subroutine call instructions and
jump instructions can be used as 2-byte instructions, reducing the number of program steps.
Address 0180016 to 03FFF16 and address 2800016 to 2FFFF16 are reserved and cannot be used.
Figure 2.1.1 Memory map
0000016
FFFFF16
0040016
0400016
017FF16
External area
SFR area
For details, see Figures
2.1.2 to 2.1.4
Internal RAM area
Internal reserved
area
FFE0016
FFFDC16
FFFFF16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
Reset
Special page
vector table
DBC
NMI
0180016
03FFF16
Internal reserved
area
3000016
2800016
External area
003FF16