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參數(shù)資料
| 型號(hào)： | M30626FJPGP |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單片16位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 22/87頁(yè) |
| 文件大?。?/td> | 901K |
| 代理商： | M30626FJPGP |
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M16C/62 Group (M16C/62P, M16C/62PT)
2. Central Processing Unit (CPU)
4
8
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3
0
0
2
,
0
.
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0
1
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page 22
2.3 Frame Base Register (FB)
FB is configured with 16 bits, and is used for FB relative addressing.
2.4 Interrupt Table Register (INTB)
INTB is configured with 20 bits, indicating the start address of an interrupt vector table.
2.5 Program Counter (PC)
PC is configured with 20 bits, indicating the address of an instruction to be executed.
2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
Stack pointer (SP) comes in two types: USP and ISP, each configured with 16 bits.
Your desired type of stack pointer (USP or ISP) can be selected by the U flag of FLG.
2.7 Static Base Register (SB)
SB is configured with 16 bits, and is used for SB relative addressing.
2.8 Flag Register (FLG)
FLG consists of 11 bits, indicating the CPU status.
2.8.1 Carry Flag (C Flag)
This flag retains a carry, borrow, or shift-out bit that has occurred in the arithmetic/logic unit.
2.8.2 Debug Flag (D Flag)
The D flag is used exclusively for debugging purpose. During normal use, it must be set to
“
0
”
.
2.8.3 Zero Flag (Z Flag)
This flag is set to
“
1
”
when an arithmetic operation resulted in 0; otherwise, it is
“
0
”
.
2.8.4 Sign Flag (S Flag)
This flag is set to
“
1
”
when an arithmetic operation resulted in a negative value; otherwise, it is
“
0
”
.
2.8.5 Register Bank Select Flag (B Flag)
Register bank 0 is selected when this flag is
“
0
”
; register bank 1 is selected when this flag is
“
1
”
.
2.8.6 Overflow Flag (O Flag)
This flag is set to
“
1
”
when the operation resulted in an overflow; otherwise, it is
“
0
”
.
2.8.7 Interrupt Enable Flag (I Flag)
This flag enables a maskable interrupt.
Maskable interrupts are disabled when the I flag is
“
0
”
, and are enabled when the I flag is
“
1
”
. The I
flag is cleared to
“
0
”
when the interrupt request is accepted.
2.8.8 Stack Pointer Select Flag (U Flag)
ISP is selected when the U flag is
“
0
”
; USP is selected when the U flag is
“
1
”
.
The U flag is cleared to
“
0
”
when a hardware interrupt request is accepted or an INT instruction for
software interrupt Nos. 0 to 31 is executed.
2.8.9 Processor Interrupt Priority Level (IPL)
IPL is configured with three bits, for specification of up to eight processor interrupt priority levels from
level 0 to level 7.
If a requested interrupt has priority greater than IPL, the interrupt is enabled.
2.8.10 Reserved Area
When write to this bit, write "0". When read, its content is indeterminate.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30626FJPGP#D3C | 制造商:Renesas Electronics Corporation 功能描述:MCU 16-bit M16C CISC 512KB Flash 3.3V/5V 100-Pin LQFP 制造商:Renesas Electronics Corporation 功能描述:MCU 16BIT R8C CISC 512KB FLASH 3.3V/5V 100LQFP - Trays |
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| M30626FJPGP#U7C | 功能描述:IC M16C/62P MCU FLASH 100LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/60/62P 標(biāo)準(zhǔn)包裝:160 系列:S08 核心處理器:S08 芯體尺寸:8-位 速度:40MHz 連通性:I²C，LIN，SCI，SPI 外圍設(shè)備:LCD，LVD，POR，PWM，WDT 輸入/輸出數(shù):53 程序存儲(chǔ)器容量:32KB（32K x 8） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:- RAM 容量:1.9K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 12x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:64-LQFP 包裝:托盤(pán) |
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