參數(shù)資料
型號(hào)： M30623MEP-XXXGP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述： 單片16位CMOS微機(jī)
文件頁(yè)數(shù)： 16/87頁(yè)
文件大小： 901K
代理商： M30623MEP-XXXGP
1. Overview
M16C/62 Group (M16C/62P, M16C/62PT)
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page 16
1.6 Pin Description
Table 1.9 Pin Description (100-pin and 128-pin Version) (1)
Signal name Pin name
I/O type
Apply 2.7 to 5.5 V to the VCC1 and VCC2 pins and 0 V to the V
SS
pin. The VCC
apply condition is that VCC1
≥
VCC2.
(2)
Applies the power supply for the A-D converter. Connect the AVCC pin to
VCC1. Connect the AVSS pin to VSS.
The microcomputer is in a reset state when applying "L" to the this pin.
Switches processor mode. Connect this pin to VSS to when after a reset to start
up in single-chip mode. Connect this pin to VCC1 to start up in microprocessor
mode.
Switches the data bus in external memory space. The data bus is 16 bits long
when the this pin is held "L" and 8 bits long when the this pin is held "H". Set it
to either one. Connect this pin to V
SS
when an single-chip mode.
Inputs and outputs data (D0 to D7) when these pins are set as the separate bus.
Inputs and outputs data (D8 to D15) when external 16-bit data bus is set as the
separate bus.
Output address bits (A0 to A19).
Input and output data (D0 to D7) and output address bits (A0 to A7) by time-
sharing when external 8-bit data bus are set as the multiplexed bus.
Input and output data (D0 to D7) and output address bits (A8 to A15) by time-
sharing when external 16-bit data bus are set as the multiplexed bus.
Output CS0 to CS3 signals. CS0 to CS3 are chip-select signals to specify an
external space.
Output WRL, WRH, (WR, BHE), RD signals. WRL and WRH or BHE and WR
can be switched by program.
WRL, WRH and RD are selected
The WRL signal becomes "L" by writing data to an even address in an external
memory space.
The WRH signal becomes "L" by writing data to an odd address in an external
memory space.
The RD pin
signal becomes "L" by reading
data in an external memory space.
WR, BHE and RD are selected
The WR signal becomes "L" by writing data in an external memory space.
The RD
signal becomes "L" by
reading data in an external memory space.
The BHE signal becomes "L" by accessing an odd address.
Select WR, BHE and RD for an external 8-bit data bus.
ALE is a signal to latch the address.
While the HOLD pin is held "L", the microcomputer is placed in a hold state.
In a hold state, HLDA outputs a "L" signal.
While applying a "L" signal to the RDY pin, the microcomputer is placed in a wait
state.
VCC1, VCC2
VSS
AVCC
RESET
CNVSS
BYTE
D0 to D7
D8 to D15
A0 to A19
A0/D0 to
A7/D7
A1/D0 to
A8/D7
CS0 to CS3
_________ ________
RD
________
Power supply input
Analog power
supply input
Reset input
CNVSS
External data bus
width select input
Bus control pins
(4)
I
I
I
I
I
I/O
I/O
O
I/O
I/O
O
O
O
I
O
I
-
VCC1
VCC1
VCC1
VCC1
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
Power
supply
Description
I : Input O : Output I/O : Input and output
Power supply : Power supplies which relate to the external bus pins are separated as VCC2, thus they can be inter-
faced using the different voltage as VCC1.
NOTES:
1. In this manual, hereafter, VCC refers to VCC1 unless otherwise noted.
2. In M16C/62PT, apply 2.7 to 5.5 V to the VCC1 and VCC2 pins. Also the apply condition is that VCC1
≥
VCC2.
3. When use VCC1
≥
VCC2, contacts due to some points or restrictions to be checked.
4. This pin function is not in M16C/62PT.
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