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Mitsubishi microcomputers
M16C / 62T Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
35
Bus Control
(4) ALE signal
The ALE signal latches the address when accessing the multiplex bus space. Latch the address when the
ALE signal falls.
When BYTE pin = “H”
When BYTE pin = “L”
ALE
Address
Data (Note 1)
Address (Note 2)
D0/A0 to D7/A7
A8 to A19
ALE
Address
Data (Note 1)
Address
D0/A1 to D7/A8
A9 to A19
Address
A0
Note 1: Floating when reading.
Note 2: When multiplexed bus for the entire space is selected, these are I/O ports.
Note 3: In M30623 (80-pin package), P10 to P17 which are in common with D8 to D15 are available.
So, M30623 (80-pin package) can operate only when BYTE pin = “H” (the width of external
data bus is 16-bit).
Figure 1.12.2. ALE signal and address/data bus
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(5) The RDY signal
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RDY is a signal that facilitates access to an external device that requires long access time. As shown in
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Figure 1.12.3, if an “L” is being input to the RDY at the BCLK falling edge, the bus turns to the wait state. If
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an “H” is being input to the RDY pin at the BCLK falling edge, the bus cancels the wait state. Table 1.12.4
shows the state of the microcomputer with the bus in the wait state, and Figure 1.12.3 shows an example in
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which the RD signal is prolonged by the RDY signal.
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The RDY signal is valid when accessing the external area during the bus cycle in which bits 4 to 7 of the
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chip select control register (address 000816) are set to “0”. The RDY signal is invalid when setting “1” to all
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bits 4 to 7 of the chip select control register (address 000816), but the RDY pin should be treated as properly
as in non-using.
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Note 1: The RDY signal cannot be received immediately prior to a software wait.
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Note 2: In M30623(80-pin package), CS signals have no corresponding external pin.
Table 1.12.4. Microcomputer status in ready state (Note 1)
Item
Status
Oscillation
On
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R/W signal, address bus, data bus, CS
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Maintain status when RDY signal received
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ALE signal, HLDA, programmable I/O ports
Internal peripheral circuits
On