12. Timer A
page 92
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Figure 12.5 TA0 to TA4 Registers, TABSR Register, and UDF Register
Symbol
Address
After Reset
TA0
038716, 038616
Undefined
TA1
038916, 038816
Undefined
TA2
038B16, 038A16
Undefined
TA3
038D16, 038C16
Undefined
TA4
038F16, 038E16
Undefined
b7
b0 b7
b0
(b15)
(b8)
Timer Ai Register (i= 0 to 4) (1)
Function
Setting Range
Timer
mode
Event
counter
mode
One-shot
timer mode
Mode
RW
WO
RW
WO
Symbol
Address
After Reset
TABSR
038016
0016
Count Start Flag
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
1. The register must be accessed in 16 bit units.
2. If the TAi register is set to 000016, the counter does not work and timer Ai interrupt requests are not
generated either. Furthermore, if “pulse output” is selected, no pulses are output from the TAiOUT pin.
3. If the TAi register is set to 000016, the pulse width modulator does not work, the output level on the
TAiOUT pin remains low, and timer Ai interrupt requests are not generated either. The same applies
when the 8 high-order bits of the timer TAi register are set to 000016 while operating as an 8-bit pulse
width modulator.
4. Use the MOV instruction to write to the TAi register.
5. The timer counts pulses from an external device or overflows or underflows in other timers.
Divide the count source by n + 1 where n = set
value
000016 to FFFE16
(3, 4)
000016 to FFFF16
(2, 4)
0016 to FE16
(High-order address)
0016 to FF16
(Low-order address)
(3, 4)
Modify the pulse width as follows:
PWM period: (28 – 1) x (m + 1)/ fj
High level PWM pulse width: (m + 1)n / fj where
n = high-order address set value, m = low-order
address set value, fj = count source frequency
Modify the pulse width as follows:
PWM period: (216 – 1) / fj
High level PWM pulse width: n / fj where n = set
value, fj = count source frequency
Divide the count source by n where n = set
value and cause the timer to stop
Divide the count source by FFFF16 – n + 1
where n = set value when counting up or by n +
1 when counting down(5)
Pulse width
modulation
mode
(16-bit PWM)
Pulse width
modulation
mode
(8-bit PWM)
Bit Name
Function
Bit Symbol
0 : Stops counting
1 : Starts counting
Timer B2 count start flag
TB2S
Timer B1 count start flag
TB1S
Timer B0 count start flag
TB0S
Timer A4 count start flag
TA4S
Timer A3 count start flag
TA3S
Timer A2 count start flag
TA2S
Timer A1 count start flag
TA1S
Timer A0 count start flag
TA0S
RW
Symbol
Address
After Reset
UDF
038416
0016
Up/Down Flag (1)
b7 b6 b5 b4 b3 b2 b1 b0
Bit Name
Function
Bit Symbol
0: Down count
1: Up count
TA4P
TA3P
TA2P
Timer A4 up/down flag
TA4UD
Timer A3 up/down flag
TA3UD
Timer A2 up/down flag
TA2UD
Timer A1 up/down flag
TA1UD
Timer A0 up/down flag
TA0UD
RW
WO
Enabled by setting the MR2 bit in
the TAiMR register to 0
(= switching source in UDF register)
during event counter mode
0: two-phase pulse signal
processing disabled
1: two-phase pulse signal
processing enabled (2, 3)
Timer A2 two-phase pulse
signal processing select bit
Timer A3 two-phase pulse
signal processing select bit
Timer A4 two-phase pulse
signal processing select bit
NOTES:
1. Use MOV instruction to write to this register.
2. Make sure the port direction bits for the TA2IN to TA4IN and TA2OUT to TA4OUT pins are set to 0
input mode.
3. When the two-phase pulse signal processing function is not used, set the corresponding bit to 0.