
REVISION HISTORY M16C/26A Group (M16C/26A, M16C/26B, M16C/26T) Hardware Manual
Rev.
Date
Description
Page
Summary
C-1
2.00 Feb.15,07
-
M16C/26B newly added, word standardized: on-chip oscillator, development tool
Overview
1
Description partially deleted
2 - 3
1.2 Performance Outline modified
4 - 5
Figure 1.1 and 1.2 Block Diagrams updated
61.4 Product List updated
7Figure 1.3 Product Numbering System updated
8Tables 1.7 to 1.10 Product Codes updated
12, 14
Tables 1.11 and 1.12 Pin Characteristics newly added
15 - 16
Tables 1.13 Pin Description newly added
SFRs
20
Table 4.1 SFR Information(1) Note about WDC register is deleted
22
Table 4.3 SFR Information(3) Value after reset for ROCR register modified
23
Table 4.4 SFR Information(4) Note 2 added to IFSR2A register
Reset
28
Figure 5.1.1.2. Reset Sequence Vcc line and ROC line are modified
29
Figure 5.5.1. Voltage Detection Circuit Block WDC register’s block is deleted
Processor Mode
35
Figure 6.1 PM1 Register Note 2 partially added
36
Figure 6.2 PM2 Register newly added
37
Figure 6.3 Bus Block Diagram and Table 6.1 Accessible Area and Bus Cycle
newly added
Clock Generation Circuit
41
Figure 7.4 ROCR Register modified
43
Figure 7.6 PM2 Register Notes 2, 5, 6 modified
45 - 46
Figure 7.1.1 and 7.2.1 Examples of Main Clock Connection Circuit updated
47
7.4 PLL Clock Description modified for M16C/26B
Table 7.4.1 Example for Setting PLL Clock Frequencies Note 1 modified
50
7.6.1 Normal Operation Mode Description modified
51
Table 7.6.1.1 Setting Clock Related Bit and Modes modified
54
Figure 7.6.1 State Transition to Stop Mode and Wait Mode modified
55
Figure 7.6.1.1. State Transtion in Normal Mode modified
56
Table 7.6.1 Allowed Transition and Setting modified, Notes 1 and 2 modified
59
Figure 7.8.3.1 Procedure to Switch Clock Source From On-chip Oscillator
to Main Clock upadated
Protection
60
Description partially modified
Interrupt
76
______
9.6 INT Interrupt Description partially added