
9. Interrupt
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Maskable Interrupt: An interrupt which can be enabled (disabled) by the interrupt enable flag (I flag) or
whose interrupt priority can be changed by priority level.
Non-maskable Interrupt: An interrupt which cannot be enabled (disabled) by the interrupt enable flag
(I flag) or whose interrupt priority cannot be changed by priority level.
Figure 9.1.1. Interrupts
Interrupt
Software
(Non-maskable interrupt)
Hardware
Special
(Non-maskable interrupt)
Peripheral function (Note 1)
(Maskable interrupt)
Undefined instruction (UND instruction)
Overflow (INTO instruction)
BRK instruction
INT instruction
_______
NMI
________
DBC (Note 2)
Watchdog timer
Oscillation stop and re-oscillation
detection
Voltage down detection
Single step (Note 2)
Address match
Note 1: Peripheral function interrupts are generated by the microcomputer's internal functions.
Note 2: Do not normally use this interrupt because it is provided exclusively for use by development
support tools.
9. Interrupt
Note
M16C/26A(42-pin version) do not use UART0 transmission interrupt and UART0 reception interrupt
of peripheral function.
M16C/26T do not use voltage down detection interrupt.
9.1 Type of Interrupts
Figure 9.1.1 shows types of interrupts.