![](http://datasheet.mmic.net.cn/30000/M30260M3A-XXXGP-U5_datasheet_2358673/M30260M3A-XXXGP-U5_327.png)
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19. Usage Precaution
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19.8.3 Reception
1. In operating the clock-synchronous serial I/O, operating the transmitter generates a clock for the re-
ceiver shift register. Fix settings for transmission even when using the device only for reception. Dummy
data is output to the outside from the TxDi pin when receiving data.
2. When an internal clock is selected, set the TE bit in the UiC1 register (i = 0 to 2) to 1 (transmission
enabled) and write dummy data to the UiTB register, and the clock for the receiver shift register will
thereby be generated. When an external clock is selected, set the TE bit to "1" and write dummy data to
the UiTB register, and the clock for the receiver shift register will be generated when the external clock
is fed to the CLKi input pin.
3. When successively receiving data, if all bits of the next receive data are prepared in the UARTi receive
register while the RE bit in the UiC1 register (i = 0 to 2) is set to “1” (data present in the UiRB register),
an overrun error occurs and the OER bit in the UiRB register is set to “1” (overrun error occurred). In this
case, because the content of the UiRB register is indeterminate, a corrective measure must be taken by
programs on the transmit and receive sides so that the valid data before the overrun error occurred will
be retransmitted. Note that when an overrun error occurred, the IR bit in the SiRIC register does not
change state.
4. To receive data in succession, set dummy data in the lower-order byte of the UiTB register every time
reception is made.
5. When an external clock is selected, make sure the external clock is in high state if the CKPOL bit is set
to “0”, and in low state if the CKPOL bit is set to “1” before the following conditions are met:
Set the RE bit in the UiC1 register to “1” (reception enabled)
Set the TE bit in the UiC1 register to “1” (transmission enabled)
Set the TI bit in the UiC1 register to “0” (data present in the UiTB register)