參數(shù)資料
型號： M30240F7-XXXFP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述： 單片16位CMOS微機
文件頁數(shù)： 92/142頁
文件大小： 1637K
代理商： M30240F7-XXXFP
1-92
Mitsubishi microcomputers
M30240 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Preliminary Specifications REV. E
Specifications in this manual are tentative and subject to change
UART0 through UART2
Figure 1.82: UARTi transmit/receive mode register in clock synchronous serial I/O mode
Table 1.25:
Specifications of clock synchronous serial I/O mode (2)
Item
Specification
Select function
CLK polarity selection
Whether transmit data is output/input at the rising edge or falling edge of the transfer clock can be
selected
LSB first/MSB first selection
Whether transmission/reception begins with bit 0 or bit 7 can be selected
Continuous receive mode selection
Reception is enabled simultaneously by a read from the receive buffer register
Transfer clock output from multiple pins selection (UART1)
UART1 transfer clock can be chosen by software to be output from one of the two pins set
Switching serial data logic (UART2)
Whether to reverse data in writing to the transmission buffer register or reading the reception buffer
register can be selected.
Switching serial data logic (UART2)
This function is reversing TxD port output and RxD port input. All I/O data level is reversed.
Symbol
UiMR(i=0,1)
Address
03A0
16
, 03A8
16
When reset
00
16
CKDIR
UARTi transmit/receive mode registers
Internal/external clock
select bit
STPS
PRY
PRYE
SLEP
0 : Internal clock
1 : External clock
Bit name
Function
Bit symbol
W
R
b7
0
b6
b5
b4
b3
b2
0
b1
0 1
b0
0 (Must always be “0” in clock synchronous serial I/O mode)
SMD0
SMD1
SMD2
Serial I/O mode select bit
0 0 1 : Clock synchronous serial
I/O mode
b2 b1 b0
Invalid in clock synchronous serial I/O mode
Symbol
U2MR
Address
0378
16
When reset
00
16
CKDIR
UART2 transmit/receive mode register
Internal/external clock
select bit
STPS
PRY
PRYE
IOPOL
0 : Internal clock
1 : External clock
Bit name
Function
Bit symbol
b7
0
b6
b5
b4
b3
b2
0
b1
0 1
b0
SMD0
SMD1
SMD2
Serial I/O mode select bit
0 0 1 : Clock synchronous serial
I/O mode
b2 b1 b0
Invalid in clock synchronous serial I/O mode
TxD, RxD I/O polarity
reverse bit (Note)
0 : No reverse
1 : Reverse
Note: Usually set to “0”.
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
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