參數(shù)資料
型號(hào): M30240F4-XXXFP
廠商: Mitsubishi Electric Corporation
英文描述: CAP 3.9PF 50V .10 PF CER-U SMD-0402 TR-7 PLATED-NI/SN LOWESR
中文描述: 單片16位CMOS微機(jī)
文件頁數(shù): 90/142頁
文件大?。?/td> 1637K
代理商: M30240F4-XXXFP
1-90
Mitsubishi microcomputers
M30240 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Preliminary Specifications REV. E
Specifications in this manual are tentative and subject to change
UART0 through UART2
Figure 1.81: Serial I/O-related registers (5)
Note: When using multiple pins to output the transfer clock, the following requirements must be met:
UART1 internal/external clock select bit (bit 3 at address 03A8
16
) = “0”.
UART transmit/receive control register 2
Symbol
UCON
Address
03B0
16
When reset
X0000000
2
b7
b6
b5
b4
b3
b2
b1
b0
Bit name
Bit
symbol
W
R
Function
(During UART mode)
Function
(During clock synchronous
serial I/O mode)
0 :
Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
CLKMD0
CLKMD1
UART0 transmit
interrupt cause select bit
UART0 continuous
receive mode enable bit
0 : Continuous receive
mode disabled
1 : Continuous receive
mode enable
0 : Continuous receive
mode disabled
1 : Continuous receive
mode enabled
Valid when bit 5 = “1”
0 : Clock output to CLK1
1 : Clock output to CLKS1
UART1 continuous
receive mode enable bit
CLK/CLKS select bit 0
UART1 transmit
interrupt cause select bit
0 :
Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
0 : Normal mode
(CLK output is CLK1 only)
1 : Transfer clock output
from multiple pins
function selected
Nothing is assigned.
This bit can neither be set nor reset. When read, its content is indeterminate.
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
Must always be “0”
U0IRS
U1IRS
U0RRM
U1RRM
Invalid
Invalid
Invalid
CLK/CLKS select
bit 1 (Note)
Must always be “0”
Reserved
Must always be “0”
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