參數(shù)資料
型號： M30100M3T-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP32
封裝： 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件頁數(shù)： 120/166頁
文件大?。?/td> 2060K
代理商： M30100M3T-XXXFP
Under
development
Tentative Specifications REV.E1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupts
54
(address 004D16)
Key input interrupt
request
Port P10-P13
pull-up select bit
Pull-up
transistor
Port P10
direction register
Pull-up
transistor
Pull-up
transistor
Pull-up
transistor
P13/KI3
P12/KI2
P11/KI1
P10/KI0
Interrupt control
circuit
Key input interrupt control register
K10 input enable bit
K10 input
polarity
select bit
Port P11
direction register
K11 input enable bit
K11 input
polarity
select bit
Port P12
direction register
K12 input enable bit
K12 input
polarity
select bit
Port P13
direction register
K13 input enable bit
K13 input polarity
select bit
Port P13
direction register
Key input enable register
Bit name
Function
Bit symbol
W
R
Symbol
Address
When reset
KIEN
009816
0016
KI0EN
b7
b6
b5
b4
b3
b2
b1
b0
KI0 input enable bit
0 : Disabled
1 : Enabled
0 : Falling edge
1 : Rising edges
0 : Disabled
1 : Enabled
0 : Falling edge
1 : Rising edges
0 : Disabled
1 : Enabled
KI0 input polarity select bit
KI1 input enable bit
KI1 input polarity select bit
KI2 input enable bit
KI2 input polarity select bit
0 : Falling edge
1 : Rising edges
KI0PL
KI1EN
KI1PL
KI2EN
KI2PL
KI3 input enable bit
0 : Disabled
1 : Enabled
KI3EN
KI3 input polarity select bit
0 : Falling edge
1 : Rising edges
KI3PL
Key Input Interrupt
When the direction register of any of P10 to P13 is set for input and the KIi (i=0 to 3) input enable bit of this
port is set for enabled, if a falling or rising edge is input to that port, a key input interrupt is generated. A key
input interrupt can also be used as a key-on wakeup function for cancelling the wait mode or stop mode.
Figure 1.12.14 shows the block diagram of the key input interrupts. When the appropriate signal (“L” for a
pin that has falling edge selected and “H” for a pin that has rising edge selected) is input to a pin for the
input inhibit process has not been executed, inputs to the other pins are not detected as interrupts.
You should overwrite the KIi (i=0 to 3) input polarity select bit or the KIi (i =0 to 3) input enable bit only under
conditions where the key input interrupt is disabled. After overwriting the KIi (i=0 to 3) input polarity select
bit or the KIi (i=0 to 3) input enable bit, clear the interrupt request bit, and then enable the key input interrupt.
Figure 1.12.14. Block diagram of key input interrupt
Figure 1.12.15. Key input enable register
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