![](http://datasheet.mmic.net.cn/30000/M30102M3-XXXFP_datasheet_2358631/M30102M3-XXXFP_17.png)
Under
development
Tentative Specifications REV.E1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
SFR
17
008016
008116
008216
008316
008416
008516
008616
008716
008816
008916
008A16
008B16
008C16
008D16
008E16
008F16
009016
009116
009216
009316
009416
009516
009616
009716
009816
009916
009A16
009B16
009C16
009D16
009E16
009F16
00A016
00A116
00A216
00A316
00A416
00A516
00A616
00A716
00A816
00A916
00AA16
00AB16
00AC16
00AD16
00AE16
00AF16
00B016
00B116
00B216
00B316
00B416
00B516
00B616
00B716
00B816
00B916
00BA16
00BB16
00BC16
00BD16
00BE16
00BF16
Timer Y, Z mode register (TYZMR)
Timer Y secondary (TYSC)
External input enable register (INTEN)
Key input enable register (KIEN)
Timer C control register 1 (TCC1)
Time measurement register (TM)
Timer Y, Z waveform output control register (PUM)
Timer C control register 0 (TCC0)
Timer Y primary (TYPR)
Prescaler Y (PREY)
UART0 transmit/receive mode register (U0MR)
UART0 transmit buffer register (U0TB)
UART0 receive buffer register (U0RB)
UART1 transmit/receive mode register (U1MR)
UART1 transmit buffer register (U1TB)
UART1 receive buffer register (U1RB)
UART0 bit rate generator (U0BRG)
UART0 transmit/receive control register 0 (U0C0)
UART0 transmit/receive control register 1 (U0C1)
UART1 bit rate generator (U1BRG)
UART1 transmit/receive control register 0 (U1C0)
UART1 transmit/receive control register 1 (U1C1)
UART transmit/receive control register 2 (UCON)
Timer Z secondary (TZSC)
Timer Z primary (TZPR)
Prescaler Z (PREZ)
Timer X mode register (TXMR)
Timer X (TX)
Timer count source set register (TCSS)
Prescaler X (PREX)
Timer Y, Z output control register (TYZOC)
Prescaler 1 (PRE1)
Timer 1 (T1)
Timer C counter (TC)
Clock prescaler reset flag (CPSRF)
00C016
00C116
00C216
00C316
00C416
00C516
00C616
00C716
00C816
00C916
00CA16
00CB16
00CC16
00CD16
00CE16
00CF16
00D016
00D116
00D216
00D316
00D416
00D516
00D616
00D716
00D816
00D916
00DA16
00DB16
00DC16
00DD16
00DE16
00DF16
00E016
00E116
00E216
00E316
00E416
00E516
00E616
00E716
00E816
00E916
00EA16
00EB16
00EC16
00ED16
00EE16
00EF16
00F016
00F116
00F216
00F316
00F416
00F516
00F616
00F716
00F816
00F916
00FA16
00FB16
00FC16
00FD16
00FE16
00FF16
A-D register (AD)
Port P0 (P0)
Port P0 direction register (PD0)
Port P1 (P1)
Port P1 direction register (PD1)
Port P2 (P2)
Port P2 direction register (PD2)
Port P3 (P3)
Port P3 direction register (PD3)
Port P4 (P4)
Port P4 direction register (PD4)
Pull-up control register 0 (PUR0)
Pull-up control register 1 (PUR1)
Port P1 drive capacity control register (DRR)
A-D control register 0 (ADCON0)
A-D control register 1 (ADCON1)
A-D control register 2 (ADCON2)
D-A register (DA)
D-A control register (DACON)
Figure 1.6.2. Location of peripheral unit control registers (2)
Note: The blank area is reserved and must not be read or written.