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參數(shù)資料
| 型號： | M2V28S30ATP-8L |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 128M Synchronous DRAM |
| 中文描述： | 128M的同步DRAM |
| 文件頁數(shù)： | 14/52頁 |
| 文件大?。?/td> | 639K |
| 代理商： | M2V28S30ATP-8L |
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M2V28S20TP-6,-7,-8
M2V28S30TP-6,-7,-7L,-8,-8L
M2V28S40TP-7,-7L,-8,-8L
Jun. '99
MITSUBISHI LSIs
SDRAM (Rev. 1.0E)
128M Synchronous DRAM
(4-BANK x 8,388,608-WORD x 4-BIT)
(4-BANK x 4,194,304-WORD x 8-BIT)
(4-BANK x 2,097,152-WORD x 16-BIT)
14
FUNCTION TRUTH TABLE for CKE
Current State
CKE
n-1
H
CKE
n
X
/CS
/RAS /CAS
/WE
Add
Action
SELF-
REFRESH*1
X
X
X
X
X
INVALID
L
H
H
X
X
X
X
Exit Self-Refresh (Idle after tRC)
L
H
L
H
H
H
X
Exit Self-Refresh (Idle after tRC)
L
H
L
H
H
L
X
ILLEGAL
L
H
L
H
L
X
X
ILLEGAL
L
H
L
L
X
X
X
ILLEGAL
L
L
X
X
X
X
X
NOP (Maintain Self-Refresh)
POWER
DOWN
H
X
X
X
X
X
X
INVALID
L
H
X
X
X
X
X
Exit Power Down to Idle
L
L
X
X
X
X
X
NOP (Maintain Power Down)
ALL BANKS
IDLE*2
H
H
X
X
X
X
X
Refer to Function Truth Table
H
L
L
L
L
H
X
Enter Self-Refresh
H
L
H
X
X
X
X
Enter Power Down
H
L
L
H
H
H
X
Enter Power Down
H
L
L
H
H
L
X
ILLEGAL
H
L
L
H
L
X
X
ILLEGAL
H
L
L
L
X
X
X
ILLEGAL
L
X
X
X
X
X
X
Refer to Current State =Power Down
ANY STATE
other than
listed above
H
H
X
X
X
X
X
Refer to Function Truth Table
H
L
X
X
X
X
X
Begin CLK Suspend at Next Cycle*3
L
H
X
X
X
X
X
Exit CLK Suspend at Next Cycle*3
L
L
X
X
X
X
X
Maintain CLK Suspend
ABBREVIATIONS:
H=High Level, L=Low Level, X=Don't Care
NOTES:
1. CKE Low to High transition will re-enable CLK and other inputs
asynchronously
. A minimum
setup time must be satisfied before any command other than EXIT.
2. Power-Down and Self-Refresh can be entered only from the All Banks Idle State.
3. Must be legal command.
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