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MITSUBISHI ELECTRIC
Mar. '02
MITSUBISHI LSIs
DDR SDRAM
(Rev.1.44)
M2S56D20/ 30/ 40ATP -75AL, -75A, -75L, -75, -10L, -10
M2S56D20/ 30/ 40AKT -75AL, -75A, -75L, -75, -10L, -10
256M Double Data Rate Synchronous DRAM
SIMPLIFIED STATE DIAGRAM
ROW
ACTIVE
IDLE
PRE
CHARGE
POWER
DOWN
READ
READA
WRITE
WRITEA
POWER
ON
ACT
REFA
REFS
REFSX
CKEL
CKEH
MRS / EMRS
CKEL
CKEH
WRITE
READ
WRITEA
WRITEA
READA
READ
PRE
READA
READA
PRE
PRE
PREA
POWER
APPLIED
MODE
REGISTER
SET
SELF
REFRESH
AUTO
REFRESH
Active
Power
Down
Automatic Sequence
Command Sequence
WRITE
READ
PRE
CHARGE
ALL
MRS / EMRS
BURST
STOP
TERM